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| PIC18F4550-IP Datasheet, PDF (263/438 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology | |||
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PIC18F2455/2550/4455/4550
FIGURE 20-12: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RC7/RX/DT/SDO pin
bit 0
bit 1
bit 2
bit 6
bit 7
RC6/TX/CK pin
Write to
TXREG reg
TXIF bit
TRMT bit
TXEN bit
TABLE 20-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
53
PIR1
SPPIF(1) ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
56
PIE1
SPPIE(1) ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
56
IPR1
SPPIP(1) ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP
56
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
55
TXREG
EUSART Transmit Register
55
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
55
BAUDCON ABDOVF RCIDL RXDTP TXCKP BRG16
â
WUE ABDEN
55
SPBRGH EUSART Baud Rate Generator Register High Byte
55
SPBRG
EUSART Baud Rate Generator Register Low Byte
55
Legend: â = unimplemented, read as â0â. Shaded cells are not used for synchronous master transmission.
Note 1: Reserved in 28-pin devices; always maintain these bits clear.
© 2009 Microchip Technology Inc.
DS39632E-page 261
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