PIC18F4550-IP Datasheet, PDF (334/438 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
DAW
Syntax:
Operands:
Operation:
Decimal Adjust W Register
DAW
None
If [W<3:0> > 9] or [DC = 1] then,
(W<3:0>) + 6 → W<3:0>;
else,
(W<3:0>) → W<3:0>;
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
If [W<7:4> + DC > 9] or [C = 1] then,
(W<7:4>) + 6 + DC → W<7:4>;
else,
(W<7:4>) + DC → W<7:4>
C
0000 0000 0000 0111
DAW adjusts the eight-bit value in W,
resulting from the earlier addition of two
variables (each in packed BCD format)
and produces a correct packed BCD
result.
1
1
Q2
Read
register W
Q3
Process
Data
Q4
Write
W
Example 1:
DAW
Before Instruction
W
= A5h
C
=0
DC
=0
After Instruction
W
= 05h
C
=1
DC
=0
Example 2:
Before Instruction
W
= CEh
C
=0
DC
=0
After Instruction
W
= 34h
C
=1
DC
=0
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Decrement f
DECF f {,d {,a}}
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) – 1 → dest
C, DC, N, OV, Z
0000 01da ffff ffff
Decrement register ‘f’. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’
(default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
DECF
Before Instruction
CNT
Z
= 01h
=0
After Instruction
CNT
Z
= 00h
=1
CNT,
1, 0
DS39632E-page 332
© 2009 Microchip Technology Inc.