PIC18F4550-IP Datasheet, PDF (19/438 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 1-3: PIC18F4455/4550 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP ^{Type Type}
Description
RA0/AN0
RA0
AN0
RA1/AN1
RA1
AN1
RA2/AN2/VREF-/
CVREF
RA2
AN2
VREF-
CVREF
RA3/AN3/VREF+
RA3
AN3
VREF+
RA4/T0CKI/C1OUT/
RCV
RA4
T0CKI
C1OUT
RCV
PORTA is a bidirectional I/O port.
2 19 19
I/O TTL Digital I/O.
I Analog Analog input 0.
3 20 20
I/O TTL Digital I/O.
I Analog Analog input 1.
4 21 21
I/O TTL
I Analog
I Analog
O Analog
Digital I/O.
Analog input 2.
A/D reference voltage (low) input.
Analog comparator reference output.
5 22 22
I/O TTL Digital I/O.
I Analog Analog input 3.
I Analog A/D reference voltage (high) input.
6 23 23
I/O ST
I ST
O—
I TTL
Digital I/O.
Timer0 external clock input.
Comparator 1 output.
External USB transceiver RCV input.
RA5/AN4/SS/
HLVDIN/C2OUT
RA5
AN4
SS
HLVDIN
C2OUT
7 24 24
I/O TTL
I Analog
I TTL
I Analog
O—
Digital I/O.
Analog input 4.
SPI slave select input.
High/Low-Voltage Detect input.
Comparator 2 output.
RA6
—— —— —
See the OSC2/CLKO/RA6 pin.
Legend:
Note 1:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I
= Input
O = Output
P
= Power
Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
2: Default assignment for CCP2 when CCP2MX Configuration bit is set.
3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
© 2009 Microchip Technology Inc.
DS39632E-page 17