PIC18F4550-IP Datasheet, PDF (21/438 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 1-3: PIC18F4455/4550 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP ^{Type Type}
Description
PORTC is a bidirectional I/O port.
RC0/T1OSO/T13CKI
RC0
T1OSO
T13CKI
15 34 32
I/O ST
O—
I ST
Digital I/O.
Timer1 oscillator output.
Timer1/Timer3 external clock input.
RC1/T1OSI/CCP2/
UOE
RC1
T1OSI
CCP2⁽²⁾
UOE
16 35 35
I/O ST
I CMOS
I/O ST
O—
Digital I/O.
Timer1 oscillator input.
Capture 2 input/Compare 2 output/PWM2 output.
External USB transceiver OE output.
RC2/CCP1/P1A
RC2
CCP1
P1A
17 36 36
I/O ST
Digital I/O.
I/O ST
Capture 1 input/Compare 1 output/PWM1 output.
O TTL Enhanced CCP1 PWM output, channel A.
RC4/D-/VM
RC4
D-
VM
23 42 42
I TTL Digital input.
I/O —
USB differential minus line (input/output).
I TTL External USB transceiver VM input.
RC5/D+/VP
RC5
D+
VP
24 43 43
I TTL Digital input.
I/O —
USB differential plus line (input/output).
I TTL External USB transceiver VP input.
RC6/TX/CK
RC6
TX
CK
25 44 44
I/O ST
O—
I/O ST
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see RX/DT).
RC7/RX/DT/SDO
RC7
RX
DT
SDO
26 1
1
I/O ST
I ST
I/O ST
O—
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see TX/CK).
SPI data out.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
2: Default assignment for CCP2 when CCP2MX Configuration bit is set.
3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
© 2009 Microchip Technology Inc.
DS39632E-page 19