HFA3860 Datasheet, PDF (36/40 Pages) Intersil Corporation – 11 Mbps Direct Sequence Spread Spectrum Baseband Processor

HFA3860
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND -0.5V to V_CC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.70V to +3.60V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40^oC to 85^oC
Thermal Information
Thermal Resistance (Typical, Note 5)
θ_JA (^οC/W)
TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
Maximum Storage Temperature Range . . . . . . . . . . -65^oC to 150^oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300^oC
(Lead Tips Only)
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33,000 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
5. θ_JA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications V_CC = 3.0V to 3.3V ±10%, T_A = -40^oC to 85^oC
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Power Supply Current
I_CCOP
V_CC = 3.6V, CLK Frequency 44MHz
(Notes 6, 7)
-
30
40
mA
Standby Power Supply Current
I_CCSB V_CC = Max, Outputs Not Loaded
-
0.5
Input Leakage Current
I_I
V_CC = Max, Input = 0V or V_CC
-10
1
Output Leakage Current
I_O
V_CC= Max, Input = 0V or V_CC
-10
1
Logical One Input Voltage
V_IH
V_CC = Min, Max
0.7 V_CC
-
Logical Zero Input Voltage
V_IL
V_CC = Min, Max
-
-
Logical One Output Voltage
V_OH
I_OH = -1mA, V_CC = Min
V_CC -0.2
-
Logical Zero Output Voltage
V_OL
I_OL = 2mA, V_CC = Min
-
.2
Input Capacitance
Output Capacitance
C_IN
C_OUT
CLK Frequency 1MHz. All measurements
referenced to GND. T_A = 25^oC, Note 7
-
-
5
5
NOTES:
6. Output load 30pF.
7. Not tested, but characterized at initial design and at major process/design changes.
1
mA
10
µA
10
µA
-
V
V_CC / 3
V
-
V
0.2
V
10
pF
10
pF
AC Electrical Specifications V_CC = 3.0V to 3.3V ±10%, T_A = -40^oC to 85^oC (Note 8)
MCLK = 44MHz
PARAMETER
SYMBOL
MIN
MAX
MCLK Period
MCLK Duty Cycle
t_CP
22
-
43/57
57/43
Rise/Fall (All Outputs)
-
10
TX_PE to Iout/Qout (1st Valid Chip)
TX_PE Inactive Width
TX_CLK Width Hi or Low
TX_RDY Active to 1st TX_CLK Hi
Setup TXD to TX_CLK Hi
Hold TXD to TX_CLK Hi
TX_CLK to TX_PE Inactive (1 MBps)
TX_CLK to TX_PE Inactive (2 MBps)
TX_CLK to TX_PE Inactive (5.5 MBps)
TX_CLK to TX_PE Inactive (11 MBps)
TX_RDY Inactive To Last Chip of MPDU Out
t_D1
2.18
2.3
t_TLP
2.22
-
t_TCD
40
-
t_RC
260
-
t_TDS
30
-
t_TDH
0
-
t_PEH
0
965
t_PEH
0
420
t_PEH
0
160
t_PEH
0
65
t_RI
-20
20
UNITS
ns
%
ns (Notes 9, 10)
µs (Notes 9, 11)
µs (Notes 9, 12)
ns
ns
ns
ns
ns (Notes 9, 22)
ns (Notes 9, 22)
ns (Notes 9, 22)
ns (Notes 9, 22)
ns
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