HFA3860 Datasheet, PDF (15/40 Pages) Intersil Corporation – 11 Mbps Direct Sequence Spread Spectrum Baseband Processor

HFA3860
differential encoding the serial data from the scrambler and
driving both the I and Q output channels together. For the 2
Mbps DQPSK data rate, the data coder implements the desired
coding as shown in the DQPSK Data Encoder table (Table 8).
This coding scheme results from differential coding of dibits (2
bits). Vector rotation is counterclockwise although bits 5 and 6
of configuration register CR2 can be used to reverse the
rotation sense of the TX or RX signal if needed.
TABLE 8. DQPSK DATA ENCODER
PHASE SHIFT
DIBIT PATTERN (D0, D1)
D0 IS FIRST IN TIME
0
00
+90
01
+180
11
-90
10
For data modulation in the MBOK modes, the data is formed
into nibbles (4 bits). For Binary MBOK modulation (5.5
Mbps) one nibble is used per symbol and for Quaternary
MBOK (11 Mbps), two are used. The data is not differentially
encoded, just scrambled, in these modes.
Spread Spectrum Modulator Description
The modulator is designed to generate DBPSK, DQPSK,
BMBOK, and QMBOK spread spectrum signals. The
modulator is capable of automatically switching its rate
where the preamble and header are DBPSK modulated, and
the data is differentially modulated. The modulator can
support data rates of 1, 2, 5.5 and 11 Mbps. The
programming details to set up the modulator are given at the
introductory paragraph of this section. The HFA3860 utilizes
Quadraphase (I/Q) modulation at baseband for all
modulation modes.
In the 1 Mbps DBPSK mode, the I and Q Channels are
connected together and driven with the output of the
scrambler and differential encoder. The I and Q Channels
are then both multiplied with the 11-bit Barker word at the
spread rate. The I and Q signals go to the Quadrature
upconverter (HFA 3724) to be modulated onto a carrier.
Thus, the spreading and data modulation are BPSK
modulated onto the carrier.
For the 2 Mbps DQPSK mode, the serial data is formed into
dibits or bit pairs in the differential encoder as detailed
above. One of the bits in a dibit goes to the I Channel and
the other to the Q Channel. The I and Q Channels are then
both multiplied with the 11-bit Barker word at the spread
rate. This forms QPSK modulation at the symbol rate with
BPSK modulation at the spread rate.
For the 5.5 Mbps Binary M-Ary Bi-Orthogonal Keying
(BMBOK) mode, the output of the scrambler is partitioned into
nibbles of sign-magnitude (4 bits LSB first). The magnitude
bits are used to select 1 of 8 eight bit modified Walsh
functions. The Walsh functions are modified by adding hex 03
to all members of a Walsh function set to insure that there is
no all 0 member as shown in Table 9. The selected function is
then XOR’d with the sign bit and connected to both I and Q
outputs. The modified Walsh functions are clocked out at the
spread rate (nominally 11 MCPS). The symbol rate is 1/8th of
this rate. The Differential Encoder output of the last bit of the
header CRC is the phase reference for the high rate data.
This reference is XOR’d with the I and Q data before the
output. This allows the demodulator to compensate for phase
ambiguity without differential encoding the high rate data.
TABLE 9. MODIFIED WALSH FUNCTIONS
MAG mWAL
DATA PATTERN
LSB.......MSB
0
03
11000000
1
0C
00110000
2
30
00001100
3
3F
11111100
4
56
01101010
5
59
10011010
6
65
10100110
7
6A
01010110
For the 11 Mbps QMBOK mode, the output of the scrambler
is partitioned into two nibbles. Each nibble is used as above
to select a modified Walsh function and set its sign. The first
of these modified Walsh spreading functions goes to the Q
Channel and the second to the I Channel. They are then
both XOR’d with the phase reference developed from the
last bit of the header CRC from the differential encoder.
Clear Channel Assessment (CCA) and
Energy Detect (ED) Description
The clear channel assessment (CCA) circuit implements the
carrier sense portion of a carrier sense multiple access
(CSMA) networking scheme. The Clear Channel
Assessment (CCA) monitors the environment to determine
when it is feasible to transmit. The result of the CCA
algorithm is available 16µs after RX_PE goes high through
output pin 32 of the device. The CCA circuit in the HFA3860
can be programmed to be a function of RSSI (energy
detected on the channel), carrier detection, or both. The
CCA output can be ignored, allowing transmissions
independent of any channel conditions. The CCA in
combination with the visibility of the various internal
parameters (i.e., Energy Detection measurement results),
can assist an external processor in executing algorithms that
can adapt to the environment. These algorithms can
increase network throughput by minimizing collisions and
reducing transmissions liable to errors.
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