HFA3860 Datasheet, PDF (17/40 Pages) Intersil Corporation – 11 Mbps Direct Sequence Spread Spectrum Baseband Processor

HFA3860
demodulated data is differentially decoded and descrambled
before being sent to the header detection section.
In the 1 Mbps DBPSK mode, data demodulation is performed
the same as in header processing. In the 2 Mbps DQPSK
mode, the demodulator demodulates two bits per symbol and
differentially decodes these bit pairs. The bits are then
serialized and descrambled prior to being sent to the output.
In the MBOK modes, the receiver uses a complex multiplier to
remove carrier frequency offsets and a bank of serial
correlators to detect the modulation. A biggest picker finds the
largest correlation in the I and Q Channels and determines
the sign of those correlations. For this to happen, the
demodulator must know absolute phase which is determined
by referencing the data to the last bit of the header. Each
symbol demodulated determines 1 or 2 nibbles of data.
This is then serialized and descrambled before passing on to
the output.
Chip tracking in the MBOK modes is chip decision directed.
Carrier tracking is via a lead/lag filter using a digital Costas
phase detector.
Acquisition Description
The PRISM baseband processor uses a dual antenna mode
of operation for compensation against multipath interference
losses.
Two Antenna Acquisition
(Recommended for Indoor Use)
During the 2 antenna (diversity) mode the two antennas are
scanned in order to find the one with the best representation
of the signal. This scanning is stopped once a suitable signal
is found and the best antenna is selected.
A projected worst case time line for the acquisition of a signal
in the two antenna case is shown in Figure 12. The
synchronization part of the preamble is 128 symbols long
followed by a 16-bit SFD. The receiver must scan the two
antennas to determine if a signal is present on either one and,
if so, which has the better signal. The timeline is broken into
16 symbol blocks (dwells) for the scanning process. This
length of time is necessary to allow enough integration of the
signal to make a good acquisition decision. This worst case
time line example assumes that the signal is present on
antenna A1 only (A2 is blocked). It further assumes that the
signal arrives part way into the first A1 dwell such as to just
barely miss detection. The signal and the scanning process
are asynchronous and the signal could start anywhere. In this
timeline, it is assumed that all 16 symbols are present, but
they were missed due to power amplifier ramp up. Since A2
has insufficient signal, the first A2 dwell after the start of the
preamble also fails detection. The second A1 dwell after
signal start is successful and a symbol timing measurement is
achieved.
Meanwhile signal quality and signal frequency measurements
are made simultaneous with symbol timing measurements.
When the bit sync level, SQ1, and Phase variance SQ2 are
above their user programmable thresholds, the signal is
declared present for the antenna with the best signal. More
details on the Signal Quality estimates and their
programmability are given in the Acquisition Signal Quality
Parameters section of this document.
At the end of each dwell, a decision is made based on the
relative values of the signal qualities of the signals on the two
antennas. In the example, antenna A1 is the one selected, so
the recorded symbol timing and carrier frequency for A1 are
used thereafter for the symbol timing and the PLL of the NCO
to begin carrier de-rotation and demodulation.
Prior to initial acquisition the NCO was inactive and DPSK
demodulation processing was used. Carrier phase
measurement are done on a symbol by symbol basis
afterward and coherent DPSK demodulation is in effect.
After a brief setup time as illustrated on the timeline of Figure
12, the signal begins to emerge from the demodulator.
It takes 7 more symbols to seed the descrambler before valid
data is available. This occurs in time for the SFD to be
received. At this time the demodulator is tracking and in the
coherent PSK demodulation mode it will no longer scan
antennas.
One Antenna Acquisition
When only one antenna is being used, the user can delete
the antenna switch.
No register changes are required. Acquisition will follow the
timeline of Figure 12.
Acquisition Signal Quality Parameters
Two measures of signal quality are used to determine
acquisition. The first method of determining signal presence
is to measure the correlator output (or bit sync) amplitude.
This measure, however, flattens out in the range of high BER
and is sensitive to signal amplitude. The second measure is
phase noise and in most BER scenarios it is a better
indication of good signals plus it is insensitive to signal
amplitude. The bit sync amplitude and phase noise are
integrated over each block of 16 symbols used in acquisition
or over blocks of 64 symbols in the data demodulation mode.
The bit sync amplitude measurement represents the peak of
the correlation out of the PN correlator. Figure 13 shows the
correlation process. The signal is sampled at twice the chip
rate (i.e., 22 MSPS). The one sample that falls closest to the
peak is used for a bit sync amplitude sample for each
symbol. This sample is called the on-time sample. High bit
sync amplitude means a good signal. The early and late
samples are the two adjacent samples and are used for
tracking.
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