BBT3420 Datasheet, PDF (31/38 Pages) Intersil Corporation – Quad 2.488-3.1875Gbps/Channel Transceiver

BBT3420
6-3 Timing Characteristics
All specifications assume T_A = 0°C to +70°C, V_DD = V_DDA = 1.8 ± 0.1V, V_DDQ = 2.5 ± 0.2V, unless otherwise specified.
TABLE 6-8. TRANSMIT PARALLEL INTERFACE TIMING (see Figure 6-1 & Figure 6-2)
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
T_SU
T_HOLD
TT_LAT (codec)
TT_LAT (raw)
Setup Time
Hold Time
Transmitter latency with encoder enabled
Transmitter latency with encoder disabled
0.4
ns
0.4
ns
65
70
UI
55
65
UI
TABLE 6-9. RECEIVE PARALLEL INTERFACE TIMING (see Figure 6-3 through Figure 6-6)
SYMBOL
PARAMETER
MIN
TYP
MAX
RT_SYNC
T_DVCC
Bit Sync Time
Time data valid before the rising edge or falling edge
0.96
of the alignment clock
2500
T_CCDV
Time data valid after the rising or falling edge of the
0.96
alignment clock
RT_LAT (codec)
Receiver latency with encoder enabled
55
RT_LAT (raw)
Receiver latency with encoder disabled
45
RT_SKEWIN
Input skew between channels in trunking mode1
NOTE:
1. RT_SKEWIN is defined as input skew to BBT3420 high speed input receiver.
125
195
115
185
±3
UNIT
Bits
ns
ns
UI
Bits
Bytes
TABLE 6-10. REFERENCE CLOCK REQUIREMENTS
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
1/T_REFCLK
T_JREF
Refduty
Ref clock frequency range (Note 1)
Ref clock frequency offset
Ref clock duty cycle
124.4
-100
45
159.375
MHz
100
ppm
50
55
%
NOTE:
1. System requirements are normally much more restrictive, typically ±100ppm. This specification refers to the range over which the BBT3420 will
operate.
TABLE 6-11. TRANSMIT SERIAL DIFFERENTIAL OUTPUT TIMING (see Figure 6-12)
SYMBOL
PARAMETER
MIN
TYP
T_ODR
Rise time (20%-80%)
100
T_ODF
Fall time (20%-80%)
100
T_OCCDS
Channel to Channel Differential Skew (Note 1)
Random Jitter (RMS, 1100 pattern) (Note 2)
2.488Gbps
2
3.125Gbps
2.5
3.1875Gbps
2.5
TX_JIT
Total Jitter (RMS, encoded BIST pattern)
2.488Gbps
3.125Gbps (Note 3)
6
3.1875Gbps
NOTES:
1. Parameter is guaranteed by design.
2. Strictly the 1010 pattern causes a small additional non-random jitter, so that the true random jitter is slightly less than that shown.
3. Max jitter for CJPAT pattern is around 10ps.
MAX
130
130
15
4
4
4
8
8
8
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