82596DX Datasheet, PDF (40/77 Pages) Intel Corporation – HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR

82596DX SX
7
0
PAD
BIT
STUFF
CRC16
CRC32
NO CRC
INSER
Tx ON
NO CRS
MAN
NRZ
BC
PRM
DIS
MODE
BYTE 8
PRM (Bit 0)
Promiscuous mode
BC DIS (Bit 1)
Broadcast disable
MANCH NRZ (Bit 2)
Manchester or NRZ encoding See specific timing require-
ments for TxC in Manchester mode
TONO CRS (Bit 3)
Transmit on no CRS
NOCRC INS (Bit 4)
No CRC insertion
CRC-16 CRC-32 (Bit 5)
CRC type
BIT STF (Bit 6)
Bit stuffing
PAD (Bit 7)
Padding
DEFAULT 00h
7
0
CDT SRC
COLLISION DETECT FILTER
CRS SRC
CARRIER SENSE FILTER
BYTE 9
CRSF (Bits 0–2)
Carrier Sense filter (length)
CRS SRC (Bit 3)
CDTF (Bits 4–6)
Carrier Sense source
Collision Detect filter (length)
CDT SRC (Bit 7)
Collision Detect source
DEFAULT 00h
7
0
MINIMUM FRAME LENGTH
BYTE 10
MIN FRAME LEN
Minimum frame length
DEFAULT 40h
7
MONITOR
BYTE 11
PRECRS (Bit 0)
LNGFLD (Bit 1)
CRCINM (Bit 2)
AUTOTX (Bit 3)
CDBSAC (Bit 4)
MC ALL (Bit 5)
MONITOR (Bits 6–7)
DEFAULT FFH
MC ALL CDBSAC
AUTOTX
CRCINM
LNGFLD
0
PRECRS
Preamble until Carrier Sense
Length field Enables padding at the End-of-Carrier framing
(802 3)
Rx CRC appended to the frame in memory
Auto retransmit
Collision Detect by source address recognition
Enable to receive all MC frames
Receive monitor options
40