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TC11IB Datasheet, PDF (9/108 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
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TC11IB
Pin Configuration
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
A
HD
RST
P1.15 P1.13 P1.11
P 1.7
P 1 .4
P 1 .0
P 2 .12
P 2 .1 0
M II_
M DIO
M II_
TxCLK
V DD
PLL42
VSS
PLL96
XTAL2
XTAL1
V LMU V DD
REF DRAM
P 2 .3
P 2 .1
ALE
CS
GLB
BAA
HLDA
A [2 0 ]
A D [3 1]
Reser
ved
A
B
OCDS
2PS[2]
NMI
P 1.14
VDD
P1.8 P1.5 P1.1 P2.14 P2.11 P2.8
VDD
PLL42 VDD VDD PLL96
CTRL PLL96 OSC CTRL
P 2.7
P2.5 P2.2
ADV
CMDE
CSFPI LAY BREQ
A [2 1 ]
AD[23] AD[30] AD[29] B
C
OCDS
2P C [7]
CPU
CLK
PO
RST
P 1 .12
P 1.9
P 1 .6
P 1 .2
P2.15 P2.13
P 2 .9
M II_
RxCLK
TM
CTRL2
VSS
PLL42
V SSOSC
TM
CTRL1
P 2.6
P 2 .4
P 2 .0
W AIT
CS
OVL
MR_W HOLD
A [2 2 ]
AD[22] AD[21] AD[28] C
D
OCDS
2P C [4]
OCDS
2PS[1]
OCDS
2PS[4]
V SS
P 1 .1 0
V DD
P 1.3 V DDP
V SS
V DD
VDDP CLK42 VSS
V DDP
Reser
ved
VDDP
V DD
V SS V DDP SVM V DD A[23] V SS AD[20] AD[27] AD[26] D
E
OCDS
2P C [3]
OCDS
2P C [6]
OCDS
2PS[0]
OCDS
2PS[3]
AD[19] AD[18] AD[25] AD[24] E
F
OCDS
2P C [1]
OCDS OCDS
2PC[2] 2PC[5]
VDD
G
OCDS
2P C [0]
OCDS
2BRK
[0]
OCDS
2BRK
[1]
OCDS
2BRK
[2]
H
V DD
OCDS BRK
_E _IN
VDDP
J
CFG
[2]
CFG
[3]
BRK
_OUT
V SS
K
P 0.0
CFG
[0]
CFG
[1]
VDD
388-Pin P-BGA Package Pin Configuration (top view)
for TC11IB
VDD AD[17] AD[16] AD[15] F
A D[7] AD[6] AD [14] AD [13] G
V DDP AD[5] AD [12] AD [11] H
V SS AD[4] A D[10] A D[9] J
V DD AD[2] AD[3] A D[8] K
L P 0.3 P0.2 P 0.1 V DDP
V SS
V SS
VSS
VSS
V SS
V SS
V DDP AD[1] AD[0] B C[2] L
M P0.4 P0.5 P0.6 P0.7
N P0.8 P0.9 P0.10 VDDP
P P0.11 P 0.12 P 0.13 V SS
V SS
V SS
VSS
VSS
V SS
V SS
V SS
V SS
VSS
VSS
V SS
V SS
V SS
V SS
VSS
VSS
V SS
V SS
ACLK BC[3] BC[0] BC[1] M
V SS
RD/
WR
CAS
EBU
CLK
N
V DDP CS [6] RAS CKE P
R P0.14 P0.15 P3.0 P3.1
V SS
V SS
VSS
VSS
V SS
V SS
A[17] A[18] A[19] CS[5] R
T P 3.2 V DD P 3.3 V DDP
V SS
V SS
VSS
VSS
V SS
V SS
V DDP A [16] A[15] A [14] T
U P 3.4 P3.5 P 3.6 V DD
V DD A [12] A[11] A [13] U
V P 3.7 P3.8 P 3.9 V SS
V SS A[1] A [9] A [10] V
W V DD P 3.10 P 3.11 V DDP
V DDP A[2] A [7] A[8] W
Y P3.12 P3.13 P3.14 P3.15
CS[4] A[3] A[4] A[6] Y
AA P 4.0 P4.1 P 4.2 V DD
V DD CS [3] A [5] A[0] A A
AB P4.3 P4.4 P4.5 P4.6
RM W CS[0] CS[2] RD AB
AC P4.7 P4.8 P4.9
V SS
P5.3 V DD P5.10 V DDP V SS
V DD
V DDP
P_
PME
V DDP
VSS
P_
IDSEL
VDDP
V DD
VSS
VDDP
P_
STOP
V DD
P_AD
[13]
V SS
P_C/BE CS
[0] EMU
CS[1] AC
AD P4.10 P4.11 P4.14 P5.2 P5.6 P5.9 P5.13 TM S
TDI
VCOM
REF
P_
GNT
P_AD P_AD P_AD P_AD P_AD P_AD P_ P_
[30] [28] [26] [22] [20] [18] FRAME TR DY
P_
PAR
P_AD
[15]
P_AD
[11]
P_AD
[9]
P_AD
[6]
P_AD
[2]
P_AD
[0]
AD
AE P4.12 P4.13 P5.1
P 5 .5
P 5.8
P 5 .1 2
P 5.15
TRST
TEST
MODE
P_
IN T A
P_
REQ
P_AD P_AD P_AD P_AD P_AD P_AD
[29] [27] [24] [23] [19] [16]
P_
IR D Y
P_
LOCK
P_
SERR
P_AD
[14]
P_AD
[10]
P_AD
[7]
P_AD
[4]
P_AD
[1]
Reser
ved
AE
AF P5.0 P4.15 P5.4
1
2
3
P5.7 P5.11 P5.14 TCK
4
5
6
7
TDO
8
Reser
ved
9
P_
IN T B
P_CLK P_AD
33 [31]
V DD
DRAM
P_AD P_C/BE P_AD
[25] [3] [21]
P_AD P_C/BE P_DEV P_ P_C/BE P_AD
[17] [2] SEL PER R [1] [12]
P_AD
[8]
P_AD
[5]
P_AD
[3]
Reser
ved
AF
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
MCP04950
Figure 3 TC11IB Pinning: P-BGA-388 Package (top view)
Data Sheet
5
V2.3, 2003-11
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