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TC11IB Datasheet, PDF (37/108 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller | |||
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TC11IB
The three timers in each GPTU Module T0, T1, and T2, can operate independently from
each other or can be combined:
General Features:
⢠All timers are 32-bit precision timers with a maximum input frequency of fGPTU.
⢠Events generated in T0 or T1 can be used to trigger actions in T2
⢠Timer overflow or underflow in T2 can be used to clock either T0 or T1
⢠T0 and T1 can be concatenated to form one 64-bit timer
Features of T0 and T1:
⢠Each timer has a dedicated 32-bit reload register with automatic reload on overflow
⢠Timers can be split into individual 8-, 16-, or 24-bit timers with individual reload
registers
⢠Overflow signals can be selected to generate service requests, pin output signals, and
T2 trigger events
⢠Two input pins can determine a count option
Features of T2:
⢠Count up or down is selectable
⢠Operating modes:
â Timer
â Counter
â Quadrature counter (incremental/phase encoded counter interface)
⢠Options:
â External start/stop, one-shot operation, timer clear on external event
â Count direction control through software or an external event
â Two 32-bit reload/capture registers
⢠Reload modes:
â Reload on overflow or underflow
â Reload on external event: positive transition, negative transition, or both transitions
⢠Capture modes:
â Capture on external event: positive transition, negative transition, or both
transitions
â Capture and clear timer on external event: positive transition, negative transition, or
both transitions
⢠Can be split into two 16-bit counter/timers
⢠Timer count, reload, capture, and trigger functions can be assigned to input pins. T0
and T1 overflow events can also be assigned to these functions.
⢠Overflow and underflow signals can be used to trigger T0 and/or T1 and to toggle
output pins
⢠T2 events are freely assignable to the service request nodes.
Data Sheet
33
V2.3, 2003-11
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