TC11IB Datasheet, PDF (32/108 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC11IB
High-Speed Synchronous Serial Interface
Figure 6 shows a global view of the functional blocks of the High-Speed Synchronous
Serial interface SSC.
C lock
f_SSC
C o n tro l
Address
Decoder
Interrupt
C o n tro l
SSC
M odule
RxD
TxD
RxD
TxD
S la v e
M aster
Port
C o n tro l
P1.2 / M TSR
P1.1 / M RST
P1.0 / SCLK
MCB04952
Figure 6 General Block Diagram of the SSC Interfaces
The SSC Module has three I/O lines, located at Port 1. The SSC Module is further
supplied by separate clock control, interrupt control, address decoding, and port control
logic.
The SSC supports full-duplex and half-duplex serial synchronous communication up to
24 MBaud (@ 48 MHz module clock). The serial clock signal can be generated by the
SSC itself (master mode) or can be received from an external master (slave mode). Data
width, shift direction, clock polarity, and phase are programmable. This allows
communication with SPI-compatible devices. Transmission and reception of data are
double-buffered. A 16-bit baud rate generator provides the SSC with a separate serial
clock signal.
Data Sheet
28
V2.3, 2003-11