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TC11IB Datasheet, PDF (60/108 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
TC11IB
• Important debugging support is provided through the reset prewarning operation by
first issuing an NMI to the CPU before finally resetting the device after a certain period
of time.
System Control Unit
The System Control Unit (SCU) of the TC11IB handles the system control tasks. All
these system functions are tightly coupled, thus, they are conveniently handled by one
unit, the SCU. The system tasks of the SCU are:
• PLL Control
– PLL_CLC Clock Control Register
– fSYS = 96MHz clock generation.
– fSYS = 48MHz clock generation.
• Reset Control
– Generation of all internal reset signals
– Generation of external HDRST reset signal
– Generation of LMU eDRAM reset signals
• Boot Scheme
– Hardware Booting Scheme
– Software Booting Scheme
• Power Management Control
– Enabling of several power-down modes
– Control of the PLL in power-down modes
• Watchdog Timer
• OCDS2 Trace Port Control
• Selection between PCI and Cardbus (PCMCIA) Standard Compliance
• FFI Bridge Control
• Device Identification Registers
Data Sheet
56
V2.3, 2003-11