TC11IB Datasheet, PDF (53/108 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC11IB
LFI
The LMB-to-FPI Interface (LFI) block provides the circuitry to interface (bridge) the FPI
bus to the Local Memory Bus (LMB).
LFI Features
• Compatible with the FPI 3.2 and LMB bus Specification V2.4
• Supports Burst/Single transactions, from FPI to LMB.
• Supports Burst/Single transactions, from LMB to FPI
• High efficiency and performance:
– fastest access across the bridge takes three cycles, using a bypass.
– There are no dead cycles on arbitration.
• Acts as the default master on FPI side.
• Supports abort, error and retry conditions on both sides of the bridge.
• Supports FPI’s clock the same, or half, as the LMB’s clock frequency.
• LMB clock is shut when no transactions are issue to LFI from both buses and none
are in process in the LFI to minimize the power consumption.
Data Sheet
49
V2.3, 2003-11