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TC11IB Datasheet, PDF (104/108 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
TC11IB
PCI 3.3V Timing Parameters
(Operating Conditions apply; CL = 10 pF)
Parameter
Symbol Min. Max. Units Notes
CLK to signal valid delay
- bused signals
tVAL
2
11
ns
1) 2) 3)
CLK to signal valid delay
- point to point
tVAL(PTP) 2
12
ns
1) 2) 3)
Float to active delay
Active to Float delay
Input setup time to CLK
- bused signals
tON
2
tOFF
tSU
7
ns
1) 4)
28
ns
1) 4)
ns
3) 5) 6)
Input setup time to CLK
- point to point
tSU(PTP) 10, 12
ns
3) 5)
Input hold time from CLK
tH
0
ns
5)
1) Refer to Figure 43.
2) Minimum times are evaluated with same load used for slew rate measurement (as shown in Figure 41).
Maximum times are evaluated with the load circuits as illustrated in Figure 45.
3) REQ and GNT are point to point signals and have different output valid delay and input setup times compared
to bused signals. GNT has a setup of 10 and REQ has a setup of 12. All other signals are bused.
4) For purposes of Active/Float timing measurements, the Hi-Z or "OFF" state is defined to be when the total
current delivered through the component pin is less than or equal to the leakage current specification.
5) Refer to Figure 44.
6) Setup time applies only when the device is not driving the pin. Devices cannot drive and receive signals at the
same time.
Data Sheet
100
V2.3, 2003-11