TLE9263-3QX Datasheet, PDF (46/198 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9263-3QX
Configuration Check:
in SBC Restart Mode, the CFG_VAL bit is cleared by the SBC. If the SBC Restart Mode was not triggered by a
WUF wake up from SBC Sleep Mode and the CAN was with SWK enabled, than the SYSERR bit will be set.
The SYSERR bit has to be cleared by the microcontroller.
The SYSERR bit cannot be cleared when CAN_2 is ‘1’ and below conditions occur:
• Data valid bit not set by microcontroller, i.e. CFG_VAL is not set to ‘1’. The CFG_VAL bit is reset after SWK
wake and needs to be set by the microcontroller before activation SWK again.
• CFG_VAL bit reset by the SBC when data are changed via SPI programming. (Only possible in SBC Normal
Mode)
Note: The SWK configuration is still valid if only the SWK_CTRL register is modified.
5.4.3.8 CAN Bus Timeout-Flag (CANTO)
In CAN WUF detection and CAN WUP detection 2 state the bit CANTO is set to ‘1’ if the time t_SILENCE expires.
The bit can be cleared by the microcontroller. If the interrupt function for CANTO is enabled then an interrupt is
generated in SBC Stop or SBC Normal Mode when the CANTO set to ‘1’. The interrupt is enabled by setting the
bit CANTO_ MASK to ‘1’. Each CANTO event will trigger a interrupt even if the CANTO bit is not cleared.
There is no wake out of SBC Sleep Mode because of CAN time-out.
5.4.3.9 CAN Bus Silence-Flag (CANSIL)
In CAN WUF detection and CAN WUP detection 2 state the bit CANSIL is set to ‘1’ if the time t_SILENCE expires.
The CANSIL bit is set back to ‘0’ with a WUP. With this bit the microcontroller can monitor if there is activity on the
CAN bus while being in SWK Mode. The bit can be read in SBC Stop and SBC Normal Mode.
5.4.3.10 SYNC-FLAG (SYNC)
The bit SYNC shows that SWK is working and synchronous to the CAN bus. To get a SYNC bit set it is required
to enable the CAN to CAN Normal or in Receive Only Mode or in WUF detection. It is not required to enable the
CAN SWK Mode.
The bit is set to ‘1’ if a valid CAN frame has been received (no CRC error and no stuffing error). It is set back to
‘0’ if a CAN protocol error is detected. When switching into SWK mode the SYNC bit indicates to the
microcontroller that the frame detection is running and the next CAN frame can be detected as a WUF, CAN wake-
up can now be handled by the SBC. It is possible to enter a SBC low-power mode with SWK even if the bit is not
set to ‘1’, as this is necessary in case of a silent bus.
5.4.3.11 SWK_SET FLAG (SWK_SET)
The SWK_SET bit is set to signalize the following states (see also Figure 11):
• when SWK was correctly enabled in WUF Detection state,
• when SWK was correctly enabled when in WUP Detection 1 state,
• after a SYSERR before a wake event in WUP Detection 2 state,
The bit is cleared under following conditions:
• after a wake-up (ECNT overflow, WUP in WUP detection 2, WUF in WUF detection)
• if CAN_2 is cleared
Data Sheet
46
Rev. 1.1, 2014-09-26