TLE9263-3QX Datasheet, PDF (121/198 Pages) Infineon Technologies AG – Dedicated Data Sheets are available for the different product variants

TLE9263-3QX
Supervision Functions
15.2.2 Window Watchdog
Compared to the time-out watchdog the characteristic of the window watchdog is that the watchdog timer period
is divided between an closed and an open window. The watchdog must be triggered within the open window.
A correct watchdog trigger results in starting the window watchdog period by a closed window followed by an open
window.
The watchdog timer period is at the same time the typical trigger time and defines the middle of the open window.
Taking the oscillator tolerances into account leads to a safe trigger area of:
t_WD x 0.72 < safe trigger area < t_WD x 1.20.
The typical closed window is defined to a width of 60% of the selected window watchdog timer period. Taking the
tolerances of the internal oscillator into account leads to the timings as defined in Figure 55.
A correct watchdog service immediately results in starting the next closed window.
Should the trigger signal meet the closed window or should the watchdog timer period elapse, then a watchdog
reset is created by setting the reset output RO low and the SBC switches to SBC Restart or SBC Fail-Safe Mode.
tWD x 0.6
Typ. closed window
tWD x 0.48
tWD x 0.9
Typ. open window
tWD x 0.72 tWD x 1.0 tWD x 1.20
tWD x 1.80
closed window
uncertainty
open window
uncertainty
Watchdog Timer Period (WD_TIMER)
safe trigger area
t / [tWD_TIMER]
Figure 55 Window Watchdog Definitions
15.2.3 Watchdog Setting Check Sum
A check sum bit is part of the SPI commend to trigger the watchdog and to set the watchdog setting.
The sum of the 8 data bits in the register WWD_CTRL needs to have even parity (see Equation (3)). This is
realized by either setting the bit CHECKSUM to 0 or 1. If the check sum is wrong, then the SPI command is
ignored, i.e. the watchdog is not triggered or the settings are not changed and the bit SPI_FAIL is set.
The checksum is calculated by taking all 8 data bits into account. The written value of the reserved bit 3 of the
WWD_CTRL register is considered (even if read as ‘0’ in the SPI output) for checksum calculation, i.e. if a 1 is
written on the reserved bit position, then a 1 will be used in the checksum calculation.
(3)
CHKSUM = Bit15 ⊕ … ⊕ Bit8
Data Sheet
121
Rev. 1.1, 2014-09-26