HYB25L128160AC Datasheet, PDF (31/50 Pages) Infineon Technologies AG – 128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES

HYB/E 25L128160AC
128-MBit Mobile-RAM
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T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
High Level
is required
CS
RAS
CAS
WE
BS
AP
Addr.
DQM
t _RP
Hi-Z
DQ
Minimum of 8 Refresh Cycles are required
2 Clock min.
Address Key
t _RC
Precharge
Command
All Banks
Inputs must be 1st Auto Refresh
stable for 200 µs Command
8th Auto Refresh
Command
Mode Register Any
Set Command Command
SPT03913
INFINEON Technologies
31
2003-02