HYB25L128160AC Datasheet, PDF (1/50 Pages) Infineon Technologies AG – 128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES

HYB/E 25L128160AC
128-MBit Mobile-RAM
128-MBit Synchronous Low-Power DRAM in Chipsize Packages
Datasheet (Rev. 2003-02)
High Performance:
f_CK,MAX
t_CK3,MIN
t_AC3,MAX
t_CK2,MIN
t_AC2,MAX
-7.5 -8 Units
133 125 MHz
7.5 8 ns
5.4 6 ns
9.5 9.5 ns
6 6 ns
• 8Mbit x 16 organisation
• VDD = 2.5V, VDDQ = 1.8V / 2.5V
• Fully Synchronous to Positive Clock Edge
• Four Banks controlled by BA0 & BA1
• Programmable CAS Latency: 1, 2, 3
• Programmable Wrap Sequence: Sequential
or Interleave
• Deep Power Down Mode
• Automatic and Controlled Precharge
Command
• Programmable Burst Length: 1, 2, 4, 8 and
full page
• Programmable Power Reduction Feature by
partial array activation during Self-Refresh
• Data Mask for byte control
• Auto Refresh (CBR)
• 4096 Refresh Cycles / 64ms
• Self Refresh with programmble refresh period
• Power Down and Clock Suspend Mode
• Random Column Address every CLK
(1-N Rule)
• 54-FBGA , with 9 x 6 ball array with 3
depopulated rows, 9 x 8 mm
• Operating Temperature Range
Commerical ( 0⁰ to 70⁰C)
Extended ( -25^oC to +85^oC)
The HYB/E 25L128160AC Mobile-RAMs are a new generation of low power, four bank
Synchronous DRAM’s organized as 4 banks × 2Mbit x16 with additional features for mobile
applications. These synchronous Mobile-RAMs achieve high speed data transfer rates by
employing a chip architecture that prefetches multiple bits and then synchronizes the output data to
a system clock. The chip is fabricated using the Infineon advanced process technology.
The device adds new features to the industry standards set for synchronous DRAM products.
Parts of the memory array can be selected for Self-Refresh and the refresh period during Self-
Refresh is programmable in 4 steps which drastically reduces the self refresh current, depending on
the case temperature of the components in the system application. In addition a “Deep Power Down
Mode” is available. Operating the four memory banks in an interleave fashion allows random access
operation to occur at higher rate. A sequential and gapless data rate is possible depending on burst
length, CAS latency and speed grade of the device. The device operates from a 2.5V power supply
for the core and 1.8V for the bus interface.
The Mobile-RAM is housed in a FBGA “chip-size” package. The Mobile-RAM is available in the
commercial (0⁰ to 70⁰C) and Extended ( -25^oC to +85^oC) temperature range.
INFINEON Technologies
1
2003-02