HYB25L128160AC Datasheet, PDF (17/50 Pages) Infineon Technologies AG – 128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES

HYB/E 25L128160AC
128-MBit Mobile-RAM
AC Characteristics ^{1, 2}
T_CASE = 0 to 70 °C (commercial) / -25 to 85^oC (Extended);
V_SS = 0 V; V_DD = 2.5 V nominal, V_DDQ = 1.8 V nominal, t_T = 1 ns
Parameter
Symb.
Unit Note
-7.5
-8
min. max. min. max.
Clock and Clock Enable
Clock Cycle Time
CAS Latency = 3 t_CK
CAS Latency = 2
CAS Latency = 1
Clock frequency
CAS Latency = 3 t_CK
CAS Latency = 2
CAS Latency = 1
Access Time from Clock
CAS Latency = 3 t_AC
CAS Latency = 2
CAS Latency = 1
Clock High Pulse Width
t_CH
Clock Low Pulse Width
t_CL
Transition Time
t_T
Setup and Hold Times
Input Setup Time
t_IS
Input Hold Time
t_IH
CKE Setup Time
t_CKS
CKE Hold Time
t_CKH
Mode Register Set-up Time t_RSC
Power Down Mode Entry
t_SB
Time
7.5 –
8
–
ns
9.5 –
9.5 –
ns
20 –
20 –
ns
–
133 –
125 MHz
–
105 –
105 MHz
–
50 –
50 Mhz
2, 3, 6
–
5.4 –
6
ns
–
6
–
6
ns
–
19 –
19 ns
2.5 –
3
–
ns
2.5 –
3
–
ns
0.3 1.2 0.5 1.5 ns
1.5 –
2
–
ns ⁴
0.8 –
1
–
ns ⁴
1.5 –
2
–
ns ⁴
0.8 –
1
–
ns ⁴
2
–
2
–
CLK
0
7.5 0
8
ns
Common Parameters
Row to Column Delay Time t_RCD 19 –
19 –
ns ⁵
Row Precharge Time
t_RP
19 –
19 –
ns ⁵
Row Active Time
t_RAS
45 100k 48 100k ns ⁵
Row Cycle Time
t_RC
67 –
70 –
ns ⁵
INFINEON Technologies
17
2003-02