82P33741 Datasheet, PDF (8/61 Pages) Integrated Circuit Systems – Differential reference inputs

82P33741 Datasheet
1
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
11
12
A OUT5_POS OUT5_NEG OUT6_POS OUT6_NEG VDDAO OUT11_POS VDDAO OUT10_POS CAP2
XTAL2_IN
SONET/SDH/LO
S3
XTAL1_IN
A
B
VSSAO
VDDAO
VDDAO
VSSAO
VSSAO OUT11_NEG VSSAO OUT10_NEG
VSSA
XTAL2_OUT ^MPU_MODE1/I XTAL1_OUT
2CM_SCL
B
C
VDDA
VSSA
VSS
OUT7
I2C_SDA
VDDA
VDDA
IC
CAP1
IC
MPU_MODE0/I MFRSYNC_2
2CM_SDA
K_1PPS
C
D
VSSA
VDDA
VSSCOM
VSSD
VDDD
VSSA
VSSA
CAP3
I2C_AD2 I2C_SCL
OUT9
OUT8
D
E
OSCI
VSSA
IC
VDDDO
I2C_AD1
VDDD0
VSSDO
VSSA DPLL3_LOCK IN12
IN11
FRSYNC_8K_
1PPS
E
F
TMS
VDDA
VSSA
VSSDO
VSS
VSSD
VDDD
VSSA
VDDA
IN10
IN6_NEG
IN6_POS
F
G
TCK
VDDA
IC
VSS
VSS
VSS
IC
VSS DPLL2_LOCK IN9
IN5_NEG
IN5_POS
G
H
XO_FREQ0/
LOS0
VDDA
VSSA
VSS
VSS
J
XO_FREQ1/ XO_FREQ2/
LOS1
LOS2
VSS
VSS
VSS
K
VDDA
VDDA
TRSTB
VSSAO
OUT2
VSS
VSS
VSS
VSS
RSTB
VSSDO
VSS DPLL1_LOCK IN8
VSS
INT_REQ
IN7
IC
IC
IC
VSSD
VDDD_1_8 _H
IN4_NEG
IN4_POS
J
IN3_NEG
IN3_POS
K
L
VSSA
VSSA
TDI
VDDAO
TDO
IC
VDDDO
OUT1
VSSD
VDDD_1_8 IN2_NEG
IN2_POS
L
M ^{OUT4_POS OUT4_NEG VSSAO}
VDDAO OUT3_POS OUT3_NEG VSSDO
VDDDO
IC
1
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3
4
5
6
7
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Figure 2. Pin Assignment (Top View)
IC
IN1_NEG
IN1_POS _M
10
11
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©2016 Integrated Device Technology, Inc.
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Revision 6, July 21, 2016