82P33741 Datasheet, PDF (4/61 Pages) Integrated Circuit Systems – Differential reference inputs

82P33741 Datasheet
8 ELECTRICAL SPECIFICATIONS .................................................................................................................................... 37
8.1 ABSOLUTE MAXIMUM RATING .................................................................................................................................................................. 37
8.2 RECOMMENDED OPERATION CONDITIONS ............................................................................................................................................ 37
8.3 I/O SPECIFICATIONS ................................................................................................................................................................................... 38
8.3.1 CMOS Input / Output Port .............................................................................................................................................................. 38
8.3.2 LVPECL / LVDS Input / Output Port .............................................................................................................................................. 39
8.3.2.1 PECL Input Port ............................................................................................................................................................... 39
8.3.2.2 LVPECL Output Port .................................................................................................................................................... 40
8.3.3 LVDS Input / Output Port ............................................................................................................................................................... 41
8.3.3.1 LVDS Input Port ............................................................................................................................................................... 41
8.3.3.2 LVDS Output Port ............................................................................................................................................................. 42
8.3.4 Output Clock Duty Cycle ............................................................................................................................................................... 43
8.3.5 Wiring the Differential Input to Accept
Single-Ended Levels 44
8.4 JITTER PERFORMANCE ............................................................................................................................................................................ 45
8.5 INPUT / OUTPUT CLOCK TIMING ............................................................................................................................................................... 56
8.6 OUTPUT / OUTPUT CLOCK TIMING ........................................................................................................................................................... 57
PACKAGE DIMENSIONS ..................................................................................................................................................... 58
ORDERING INFORMATION.................................................................................................................................................. 60
REVISION HISTORY ............................................................................................................................................................. 60
©2016 Integrated Device Technology, Inc.
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Revision 6, July 21, 2016