82P33741 Datasheet, PDF (54/61 Pages) Integrated Circuit Systems – Differential reference inputs

Table 37: SONET/SDH Output Clock Jitter Generation
(jitter measured on one CMOS output of APLL1/2 with one CMOS output enabled)
Output Frequency
RMS Jitter Typ (ps)
RMS Jitter Max (ps)
0.50
0.75
0.55
0.78
0.83
2.31
19.44 MHz
0.80
2.27
0.29
0.54
0.28
0.40
0.58
0.91
0.87
2.39
77.76 MHz
0.82
2.10
0.29
0.42
0.22
0.37
NOTE 1: DPLL locked to input clock
82P33741 Datasheet
Test Filter
12 kHz to 1.3MHz
12kHz to 5MHz
500 Hz to 1.3 MHz
1 kHz to 5 MHz
65 kHz to 1.3 MHz
250 kHz to 5 MHz
12 kHz to 20 MHz
500 Hz to 1.3 MHz
1 kHz to 5 MHz
65 kHz to 1.3 MHz
250 kHz to 5 MHz
Notes
GR-253-CORE and ITU-T
G.813 Option 2
limit 0.1 UI p-p /
0.01 UI RMS
(STM-16: 1UI = 0.40 ns)
ITU-T G.813 Option 1
limit 0.5 UI p-p
(STM-1: 1 UI = 6.43 ns)
ITU-T G.813 Option 1
limit 0.5 UI p-p
(STM-4: 1 UI = 1.61 ns)
ITU-T G.813 Option 1
limit 0.1 UI p-p
(STM-1: 1 UI = 6.43 ns)
ITU-T G.813 Option 1
limit 0.1 UI p-p
(STM-4: 1 UI = 1.61 ns)
ITU-T G.813 Option 1
limit 0.1 UI p-p
(STM-4: 1 UI = 1.61 ns)
GR-253-CORE and ITU-T
G.813 Option 2
limit 0.1 UI p-p
(STM-4: 1 UI = 1.61 ns)
ITU-T G.813 Option 1
limit 0.5 UI p-p
(STM-1: 1 UI = 6.43 ns)
ITU-T G.813 Option 1
limit 0.5 UI p-p
(STM-4: 1 UI = 1.61 ns)
ITU-T G.813 Option 1
limit 0.1 UI p-p
(STM-1: 1 UI = 6.43 ns)
ITU-T G.813 Option 1
limit 0.1 UI p-p
(STM-4: 1 UI = 1.61 ns)
©2016 Integrated Device Technology, Inc.
54
Revision 6, July 21, 2016