GMS81C5108 Datasheet, PDF (75/102 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C5108
19.2 Control of LCD Driver Circuit
The LCD driver is controlled by the LCD Control Register
(LCR). The LCR[1:0] determines the frequency of COM
signal scanning of each segment output. RESET clears the
LCD control register LCR values to logic zero. The LCD
display can continue to operate during SLEEP and STOP
modes if a sub-frequency clock is used as system clock
source. The constant voltage booster circuit for using LCD
driver is built in, so the definite voltage could supplied re-
gardless of power source voltage fluctuations.
Note: The Sub clock is used as voltage booster source
clock, so the stabilization time is need to use voltage boost-
er. Normally, the stabilization time is need more than
500ms. The external bias registers cannot be used for LCD
display supply voltage.
LCR(LCD Control Register)
Bit :
7
R/W
6
5
-
-
LCDEN
R/W
4
VBCL
R/W
3
LCDD1
R/W
2
LCDD0
R/W
1
LCK1
R/W
0
LCK0
ADDRESS : 0F1_H
RESET VALUE : --000000_B
LCDEN (LCD Display Enable Bit)
0: LCD Display Disable
1: LCD Display Enable
VBCL (Voltage Booster Enable Bit)
0: Voltage Booster Disable
1: Voltage Booster Enable
LCDD[1:0] (LCD Duty Selection)
00: 1/4 Duty
01: 1/3 Duty (COM[3] are used as SEG[34])
10: 1/2 Duty (COM[3:2] are used as SEG[34:35])
11: Static (COM[3:1] are used as SEG[34:36])
LCK (LCD Clock source selection)
00: f_S ÷ 32
01: f_S ÷ 64
10: f_S ÷ 128
11: f_S ÷ 256
*The fs can be selected among f_SUB (Sub clock), f_MAIN÷2⁷ (Main clck) and f_MAIN (Main clock).
And sub or main is selected by WTCK[1:0] of WTMR.
Figure 19-2 LCD Control Register
Selecting Frame Frequency
Frame frequency is set to the base frequency as shown in
the following Table 19-1. The f_S is selected to f_SUB (sub
clock) which is 32.768kHz.
LCR[1:0] LCD clock
00
f_S ÷ 32
01
f_S ÷ 64
10
f_S ÷ 128
11
f_S ÷ 256
Duty = Static
1024
512
256
128
Frame Frequency (Hz)
Duty = 1/2
Duty = 1/3
512
341.3
256
170.7
128
85.3
64
42.7
Duty = 1/4
256
128
64
32
Table 19-1 Setting of LCD Frame Frequency
The matters to be attended to use LCD driver
In reset state, LCD source clock is sub clock. So, when the
power is supplied, the LCD display would be flickered be-
fore the oscillation of sub clock is stabilized. It is recom-
mended to use LCD display on after the stabilization time
of sub clock is considered enough. If the LCD is reset dur-
ing display, the display would be blotted by the capacity of
LCD power circuit. The external circuit of constant voltage
booster for using LCD driver is shown at right.
VCL2
VCL1
VCL0
GMS81C5108
GMS87C5108
CAPH
CAPL
C1~C4=0.47uF
R1=400KΩ
R2=1MΩ
R1
C1 C2 C3
R2
C4
Figure 19-3 LCD Power Booster Circuit
72
JUNE 2001 Ver 1.0