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GMS81C5108 Datasheet, PDF (56/102 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS
GMS81C5108
12.4 16-bit Capture Mode
16-bit capture mode is the same as 8-bit capture, except
that the Timer register is running with 16 bits.
The clock source of the Timer 0 is selected either internal
or external clock by bit T0CK2, T0CK1 and T0CK0.
In 16-bit mode, the bits T1CK1,T1CK0 and 16BIT of TM1
should be set to “1” respectively.
TM0
ADDRESS : 0E0H
-
-
CAP0 T0CK2 T0CK1 T0CK0 T0CN T0ST
RESET VALUE : --000000B
1
X
X
X
X
X
TM1
POL
16BIT PWME CAP1 T1CK1 T1CK0 T1CN
T1ST
ADDRESS : 0E2H
RESET VALUE : 00000000B
X
1
0
X
1
1
X
X
X : The value “0” or “1” corresponding your operation.
T0CK[2:0]
Edge Detector
EC0
XIN
SXIN
INT0
0X
1X
2
SCMR[1:0]
÷2
÷4
÷8
÷ 32
÷ 128
÷ 512
÷ 1024
MUX
1
T0CN
CAPTURE
T0ST
0 : Stop
1 : Clear and Start
T0 + T1 (16-bit)
CLEAR
COMPARATOR
CDR1 CDR0 TDR1 TDR0
(8-bit) (8-bit) (8-bit) (8-bit)
T0IF
INT0IF
TIMER 0
INTERRUPT
INT 0
INTERRUPT
IESR[1:0]
Figure 12-10 16-bit Capture Mode
12.5 8-Bit (16-Bit) Compare OutPut Mode
The GMS81C5108 has a function of Timer Compare Out-
put. To pulse out, the timer match can goes to port pin
(R31) as shown in Figure 12-3 and Figure 12-6. Thus,
pulse out is generated by the timer match. These operation
is implemented to pin, R31/PWM.
In this mode, the bit PWMO of Port Mode Register (PMR)
should be set to “1”, and the bit PWME of Timer1 Mode
Register (TM1) should be cleared to “0”.
In addition, 16-bit Compare output mode is available, also.
This pin output the signal having a 50 : 50 duty square
wave, and output frequency is same as below equation.
fCOMP = -2----×-----P----r-O-e---s-s--c-c--a-i-l-l-l-ae---tr--i-o-V--n--a---Fl--u--r-e-e---q-×---u--(-e-T--n--D--c---yR------+-----1----)-
12.6 PWM Mode
The GMS81C5108 has one high speed PWM (Pulse Width
Modulation) function which shared with Timer1.
In PWM mode, the R31/PWM pin operates as a 10-bit res-
olution PWM output port. For this mode, the bit PWM of
Port Mode Register (PMR) and the bit PWME of timer1
mode register (TM1) should be set to “1” respectively.
The period of the PWM output is determined by the
T1PPR (PWM Period Register) and PWMHR[3:2] (bit3,2
of PWM High Register) and the duty of the PWM output
is determined by the T1PDR (PWM Duty Register) and
PWMHR[1:0] (bit1,0 of PWM High Register).
The user can use PWM data by writing the lower 8-bit pe-
riod value to the T1PPR and the higher 2-bit period value
to the PWMHR[3:2]. And the duty value can be used with
the T1PDR and the PWMHR[1:0] in the same way.
The T1PDR is configured as a double buffering for glitch-
JUNE 2001 Ver 1.0
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