GMS81C5108 Datasheet, PDF (31/102 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C5108
The operation within data memory (RAM)
ASL, BIT, DEC, INC, LSR, ROL, ROR
Example; Addressing accesses the address 0135_H regard-
less of G-flag and RPR.
981501 INC !0115_H
;A ←ROM[115_H]
115_H
data
~~
0F100_H
98
0F101_H
15
0F102_H
01
˜
~~ —
data+1 → data
–
address: 0115
X indexed direct page, auto increment→ {X}+
In this mode, a address is specified within direct page by
the X register and the content of X is increased by 1.
LDA, STA
Example; G=0, X=35_H
DB
LDA {X}+
35_H
data
~~
DB
—
~~
data → A
– ^{36H → X}
(5) Indexed Addressing
X indexed direct page (no offset) → {X}
In this mode, a address is specified by the X register.
ADC, AND, CMP, EOR, LDA, OR, SBC, STA, XMA
Example; X=15_H, G=1, RPR=01_H
D4
LDA {X}
;ACC←RAM[X].
115_H
data
~~
0E550_H
D4
—
~~
–
data → A
X indexed direct page (8 bit offset) → dp+X
This address value is the second byte (Operand) of com-
mand plus the data of
-register. And it assigns the mem-
ory in Direct page.
ADC, AND, CMP, EOR, LDA, LDY, OR, SBC, STA
STY, XMA, ASL, DEC, INC, LSR, ROL, ROR
Example; G=0, X=0F5_H
C645
LDA 45_H+X
3A_H
data
~~
0E550_H
C6
0E551_H
45
~~
–
˜
— ^{data → A}
45_H+0F5_H=13A_H
28
JUNE 2001 Ver 1.0