GMS81C5108 Datasheet, PDF (50/102 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C5108
CDR0 (Input Capture Register)
T0 (Timer 0 Counter Register)
R
R
R
R
R
R
R
R
Bit :
7
6
5
4
3
2
1
0
ADDRESS: E1_H
CDR07 CDR06 CDR05 CDR04 CDR03 CDR02 CDR01 CDR00 _{INITIAL VALUE:00H}
In Timer mode, this register is the value of Timer 0 counter and in Capture mode, this register is the value of input capture.
TDR0 (Timer 0 Data Register)
W
W
W
Bit :
7
6
5
TDR07 TDR06 TDR05
W
4
TDR04
W
W
3
2
TDR03 TDR02
W
1
TDR01
W
0
TDR00
If the counter of Timer 0 and the data of TDR0 is equal, interrupt is occurred.
ADDRESS: 0E1_H
INITIAL VALUE:FF_H
CDR1 (Input Capture Register)
T1 (Timer 1 Counter Register)
R
R
R
R
R
R
R
R
Bit :
7
6
5
4
3
2
1
0
ADDRESS: 0E4_H
CDR17 CDR16 CDR15 CDR14 CDR13 CDR12 CDR11 CDR10 _{INITIAL VALUE:00H}
In Timer mode, this register is the value of Timer 1 counter and in Capture mode, this register is the value of input capture.
TDR1 (Timer 1 Data Register)
W
W
W
Bit :
7
6
5
TDR17 TDR16 TDR15
W
4
TDR14
W
W
3
2
TDR13 TDR12
W
1
TDR11
W
0
TDR10
If the counter of Timer 1 and the data of TDR1 is equal, interrupt is occurred.
ADDRESS: 0E3_H
INITIAL VALUE:FF_H
T1PPR (Timer 1 Pulse Period Register)
W
W
W
W
W
W
W
W
Bit :
7
6
5
4
3
2
1
0
T1PPR7 T1PPR6 T1PPR5 T1PPR4 T1PPR3 T1PPR2 T1PPR1 T1PPR0
The period is decided by PWM.
ADDRESS: 0E3_H
INITIAL VALUE:FF_H
T1PDR (Timer 1 Pulse Duty Register)
W/R W/R W/R W/R W/R W/R W/R W/R
Bit :
7
6
5
4
3
2
1
0
T1PDR7 T1PDR6 T1PDR5 T1PDR4 T1PDR3 T1PDR2 T1PDR1 T1PDR0
In PWM mode, decide the pulse duty.
ADDRESS: 0E4_H
INITIAL VALUE:00_H
PWMHR (PWM High Register)
Bit :
7
6
5
-
-
-
W
W
W
W
4
3
2
1
0
-
PWM03 PWM02 PWM01 PWM00
ADDRESS: 0E5_H
INITIAL VALUE:----0000_B
Reserved
PWM Period = [PWMHR[3:2] + T1PPR] x Source Clock
PWM Duty = [PWMHR[1:0] + T1PDR] x Source Clock
Figure 12-2 Related Registers with Timer/Counter
JUNE 2001 Ver 1.0
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