GMS81C5108 Datasheet, PDF (48/102 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C5108
12. Timer / Counter
Timer/Event Counter consists of prescaler, multiplexer, 8-
bit timer data register, 8-bit counter register, mode register,
input capture register and Comparator as shown in Figure
12-3. And the PWM high register for PWM is consisted
separately.
The timer/counter has seven operating modes.
- 8 Bit Timer/Counter Mode
- 8 Bit Capture Mode
- 8 Bit Compare Output Mode
- 16 Bit Timer/Counter Mode
- 16 Bit Capture Mode
- 16 Bit Compare Output Mode
- PWM Mode
In the “timer” function, the register is increased every in-
ternal clock input. Thus, one can think of it as counting in-
Example 1:
Timer 0 = 8-bit timer mode, 8ms interval at 4MHz
Timer 1 = 8-bit timer mode, 4ms interval at 4MHz
LDM SCMR,#0
;Main clock mode
LDM TDR0,#249
LDM TM0,#0001_0011B
LDM TDR1,#124
LDM TM1,#0000_1111B
SET1 T0E
SET1 T1E
EI
:
:
:
Example 2:
Timer0 = 16-bit timer mode, 0.5s at 4MHz
LDM SCMR,#0
LDM TDR0,#23H
LDM TDR1,#0F4H
LDM TM0,#0FH
LDM TM1,#4CH
;Main clock mode
;F_MAIN/32, 8us
SET1 T0E
EI
:
:
:
ternal clock input. Since a least clock consists of 2 and
most clock consists of 1024 oscillator periods, the count
rate is 1/2 to 1/1024 of the oscillator frequency in Timer0.
And Timer1 can use the same clock source too. In addition,
Timer1 has more fast clock source (1/1 to 1/8).
In the “counter” function, the register is increased in re-
sponse to a 0-to-1 (rising edge) transition at its correspond-
ing external input pin EC0 (Timer 0).
In addition the “capture” function, the register is increased
in response external interrupt same with timer function.
When external interrupt edge input, the count register is
captured into capture data register CDRx.
Timer1 is shared with “PWM” function and “Compare
output” function.
Example 3:
Timer0 = 8-bit event counter, 2ms interval at 4MHz
Timer1 = 8-bit capture mode, 2us sampling count.
LDM TDR0,#99
;99+1, 100 count
LDM TM0,#01FH
;event counter
LDM R0DR,#XXXX_1XXXB ;R03input
LDM IESR,#XXXX_01XXB ;FALLING
LDM PMR,#XXXX_1X1XB ;EC0,INT1
LDM TDR1,#0FFH
LDM TM1,#0001_1011B ;2us
SET1
SET1
SET1
EI
:
T0E;ENABLE TIMER 0
T1E;ENABLE TIMER 1
INT1E;ENABLE EXT. INT1
X: don’t care.
Example 4:
Timer0 = 16-bit capture mode, 8us sampling count. at 4MHz
LDM TDR0,#0FFH
LDM TDR1,#0FFH
LDM TM0,#02FH
LDM TM1,#04FH
LDM IESR,#XXXX_XX01B
LDM PMR,#XXXX_XXX1B
;AS INT0
SET1
SET1
EI
:
T0E;ENABLE TIMER 0
INT0E;ENABLE EXT. INT0
X: don’t care.
JUNE 2001 Ver 1.0
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