GMS81C5108 Datasheet, PDF (40/102 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C5108
10.2 Operation Mode Switching
In the Main active mode, only the high-frequency clock os-
cillator is used.
In the Sub active mode, the low-frequency clock oscilla-
tion is used, so the low power voltage operation or the low
power consumption operation can be enabled. Instruction
execution does not stop during the change of operation
mode. In this case, some peripheral hardware capabilities
may be affected. For details, refer to the description of the
relevant operation.
The following describes the switching between the Main
active mode and the Sub active mode. During reset, the
system clock mode register is initialized at the Main active
mode. It must be set to the Sub active mode for reducing
the power consumption.
Switching from Main active to Sub active
First, write “02_H” into lower 2 bits of SCMR to switch the
main system clock to the sub-frequency clock.
Next, write “03_H” to turn off main frequency oscillation.
Example:
:
:
:
LDM SCMR,#02_H ;Switch to sub active
LDM SCMR,#03_H ;Turn off main clock
:
:
Returning from Sub active to Main active
First, write “02_H” into lower 2 bits of the SCMR to turn on
the main-frequency oscillation. This time, the stabilization
(warm-up) time needs to be taken by the software delay
routine. Sub active mode can also be released by setting the
RESET pin to low, which immediately performs the reset
operation. After reset, the GMS81C5108 is placed in Main
active mode.
Example:
:
:
:
LDM SCMR,#02_H
CALL DELAY
LDM SCMR,#0
;Turn on main-clock
;Wait until stable
;Move to main active
:
:
:
;about 65ms software delay
DELAY: LDA #0
DELAY0: INC A
CMP #85H
BCC DELAY0
RET
Shifting from the Normal operation to the SLEEP
mode
By setting bit 0 of SMR, the CPU clock stops and the
SLEEP mode is invoked. The CPU stops while other pe-
ripherals are operate normally.
The way of release from this mode is RESET and all avail-
able interrupts.
For more detail, See " SLEEP Mode" on page 39
Shifting from the Normal operation to the STOP
mode
By executing STOP instruction, the main-frequency clock
oscillation stops and the STOP mode is invoked. But sub-
frequency clock oscillation is operated continuously.
After the STOP operation is released by reset, the opera-
tion mode is changed to Main active mode.
The methods of release are RESET, Key scan interrupt,
Watch Timer interrupt, Timer/Event counter1 (EC0 pin),
SIO (External clock) and External Interrupt.
For more details, see " STOP Mode" on page 40.
Note: In the STOP and SLOW operating modes, the power
consumption by the oscillator and the internal hardware is
reduced. However, the power for the pin interface (depend-
ing on external circuitry and program) is not directly associ-
ated with the low-power consumption operation. This must
be considered in system design as well as interface circuit
design.
JUNE 2001 Ver 1.0
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