GMS81C5108 Datasheet, PDF (60/102 Pages) Hynix Semiconductor – HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C5108
13.2 Watch Dog Timer
The watch dog timer (WDT) function is used for checking
program malfunction. If the watch dog timer is not reset in
a fixed time, the WDTOUTB pin outputs a low signal.
Therefore, by connecting the WDTOUTB pin and the reset
pin externally, the MCU can be reset when the malfunction
is occurred.
Usually the stop mode is used to reduce the power con-
sumption. When the stop mode is released by watch timer
interrupt, it is recommend to set the WDTCL to clear the
2-Bit counter and enter the stop mode. If the clock source
is 1/64Hz, the WDTCL cannot be cleared in 500ms. In this
case, the user should disable the WDT by clearing the
WDTEN or disconnect the WDTOUTB pin and reset pin.
Usage of Watch Timer in STOP Mode
When the system is off and the watch should be kept work-
ing, follow the steps below.
1. Determines which mode is to be performed between
main mode and sub mode when the MCU is released
from Stop mode and set the clock source of watch timer
to sub-clock.
2. Enters in STOP mode.
3. After released by watch timer interrupt, counts up timer
and refreshes LCD Display. When the performing count
up and refresh the LCD, the CPU operates either in main
frequency mode or sub frequency mode.
4. Enters in STOP mode again.
5. Repeats 3 and 4.
When using STOP mode, if the watch timer interrupt inter-
val is selected to 2Hz, the power consumption can be
reduced considerably.
fW/211 (16Hz)
fW/213 (4Hz)
fW/214 (2Hz)
INTWT (16Hz)
INTWT (4Hz)
INTWT (2Hz)
WDTCL
WDT Reset
Signal
WDTOUTB
500msec
The WDTCL should
be set during this interval.
500msec
The WDTCL should
be set during this interval.
If the WDTCL is not cleared
during this interval, the WDTOUTB
will be low during next interval.
JUNE 2001 Ver 1.0
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