MB86R01 Datasheet, PDF (86/89 Pages) Fujitsu Component Limited. – MB86R01 DATA SHEET

MB86R01 DATA SHEET
8.5.15. SD Signal Timing
8.5.15.1. Clock
Table 8-52 AC Timing of Clock Signal
Signal Name Symbol
Description
SD_CLK
t_CLK
SD_CLK cycle
*1: 20.83MHz for SD memory card and 20MHz for multimedia card (MMC)
Min.
–
Value
Typ.
–
Unit
Max.
20.83 (*1) MHz
8.5.15.2. Input/Output Signal
Table 8-53 AC Timing of Data Signal
Signal Name Symbol
tD_DAT
SD_DAT[3:0] tS_DAT
tH_DAT
Description
Output data delay (standard of SD_CLK
falling edge)
Input data setup (standard of SD_CLK rising
edge)
Input data hold (standard of SD_CLK rising
edge)
Min.
-6.0
13.0
19.0
Value
Typ.
–
–
–
Unit
Max.
3.0 ns
–
ns
–
ns
SD_CLK
SD_DAT[3:0]
t_SDCLK
tD_DAT
tD_DAT
Figure 8-36 Output Timing to Media
SD_CLK
SD_DAT[3:0]
tS_DAT
VALID
DATA
tH_DAT
tS_DAT
VALID
DATA
tH_DAT
Figure 8-37 Input Timing from Media
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