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MB86R01 Datasheet, PDF (45/89 Pages) Fujitsu Component Limited. – MB86R01 DATA SHEET
MB86R01 DATA SHEET
8.3.2. Power On Reset
VDDI (internal)
VDDE (external)
DDRVDE (DRAM)
CLK
Input clock immediately
after power-on
Note: Clock is just an image, not the actual one.
XRST Input "L" when power-on
2 μs or more
PLL Lockup Time
output "L" when power-on
XSRST
For inputting the external signal to XSRST, input XSRST after changing XRST from "L" to "H".
XTRST input is required only when MB86R01 is in DFT mode(JTAGSEL=”H”).
Input "L" when power-on
XTRST
Figure 8-3 Power On Sequence
Input XRST pin to Low when power-on.
Keep XRST pin High after setting to Low level for 2μs or more.
Access the other registers or memory controller after PLL Lockup Time.
When MB86R01 is in DFT mode, XTRST should be input as well as XRST.
FUJITSU MICROELECTRONICS
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PROPRIETARY AND CONFIDENTIAL