MB86R01 Datasheet, PDF (18/89 Pages) Fujitsu Component Limited. – MB86R01 DATA SHEET

MB86R01 DATA SHEET
Pin multiplex group #2 (setting register: PIN MPX Select.MPX_MODE_2 [2:0])
Mode0
Mode1
Mode2
Mode3
Mode4
Pin No.
JEDEC
Pin related to
CAP0/1
Pin related
to PWM
Pin related
to I2S2
Pin related to
CAP1
(NRGB666)
Pin related to
GPIO
Pin related
to CAN
Pin related
to I2S1/2
Pin related
to MediaLB
Pin related
to GPIO
Pin related
to CAN
Pin related
to I2S1
Pin related
to MediaLB
Pin
related to
SPI
Pin related Pin related Pin related Pin related to
to GPIO to CAN to I2S1/2 MediaLB
208 V3 VIN1[7] - - RI1[7] GPIO_PD[5] -
-
- GPIO_PD[5] - -
- - GPIO_PD[5] - -
-
19 W1 VIN1[6] - - RI1[6] GPIO_PD[4] -
-
- GPIO_PD[4] - -
- - GPIO_PD[4] - -
-
118 W2 VIN1[5] - - RI1[5] - CAN_TX0 -
-
- CAN_TX0 -
- - - CAN_TX0 -
-
209 W3 VIN1[4] - - RI1[4] - CAN_RX0 -
-
- CAN_RX0 -
- - - CAN_RX0 -
-
292 W4 VIN1[3] - - RI1[3] - CAN_TX1 -
-
- CAN_TX1 -
- - - CAN_TX1 -
-
119 Y2 VIN1[2] - - RI1[2] - CAN_RX1 -
-
- CAN_RX1 -
- - - CAN_RX1 -
-
210 Y3 VIN1[1] -
- GI1[7]
-
- I2S_SCK1 -
- - I2S_SCK1 - - - - I2S_SCK1 -
293 Y4 VIN1[0] -
- GI1[6]
-
- I2S_WS1 -
- - I2S_WS1 - - - - I2S_WS1 -
211 AA3 VINVSYNC1 -
- VINVSYNC1 -
- I2S_ECLK1 -
- - I2S_ECLK1 - - - - I2S_ECLK1 -
294 AA4 VINHSYNC1 -
- VINHSYNC1 -
- I2S_SDI1 -
- - I2S_SDI1 - - - - I2S_SDI1 -
22 AB1 VINFID1 -
- VINFID1 -
- I2S_SDO1 -
- - I2S_SDO1 - - - - I2S_SDO1 -
202 M3 VINVSYNC0 -
- GI1[5]
-
-
- MLB_DATA - - - MLB_DATA - - - - MLB_DATA
203 N3 VINHSYNC0 -
- GI1[4]
-
-
- MLB_SIG - - - MLB_SIG - - - - MLB_SIG
112 N2 VINFID0 -
- GI1[3]
-
-
- MLB_CLK - - - MLB_CLK - - - - MLB_CLK
123 AD2 - PWM_O0 - GI1[2] GPIO_PD[3] -
-
- GPIO_PD[3] - -
- - GPIO_PD[3] - -
-
122 AC2 - PWM_O1 - BI1[7] GPIO_PD[2] -
-
- GPIO_PD[2] - -
- - GPIO_PD[2] - -
-
121 AB2 -
- I2S_SDO2 BI1[6] -
- I2S_SDO2 -
- - - - SPI_DO GPIO_PD[1] - -
-
24 AD1 -
- I2S_ECLK2 BI1[5] -
-
I2S_ECLK2 -
-
-
-
-
Reserved
(Input/Output)
GPIO_PD[0]
-
-
-
23 AC1 -
- I2S_SCK2 BI1[4] -
- I2S_SCK2 -
- - - - SPI_SCK - - I2S_SCK2 -
295 AB4 -
- I2S_WS2 BI1[3] -
- I2S_WS2 -
- - - - SPI_SS - - I2S_WS2 -
212 AB3 -
- I2S_SDI2 BI1[2] -
- I2S_SDI2 -
- - - - SPI_DI - - I2S_SDI2 -
Pin multiplex group #2 mode setting
This mode is set with MPX_MODE_2 bit (bit 2-0) in the multiplex mode setting register
(CMUX_MD.)
MPX_MODE_2 (bit 2-0) of
the CMUX_MD register
000
001
010
011
100
101 – 0110
111
Pin multiplex group #2 mode
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Reserved
(Initial value)
FUJITSU MICROELECTRONICS
12
PROPRIETARY AND CONFIDENTIAL