MB86R01 Datasheet, PDF (29/89 Pages) Fujitsu Component Limited. – MB86R01 DATA SHEET

MB86R01 DATA SHEET
7.2.15. Video capture related pin
Pin name
I/O Polarity
VIN0[7:0]
VINVSYNC0
VINHSYNC0
VINFID0
I
-
I
-
I
-
I
-
CCLK0
VIN1[7:0]
VINVSYNC1
VINHSYNC1
VINFID1
I
-
I
-
I
-
I
-
I
-
CCLK1
I
-
RI1[7:2]
I
-
GI1[7:2]
I
-
BI1[7:2]
I
-
*1: GI1[3] is not applicable.
*2: BI1[2] is not applicable.
Analog
/Digital
Type
Status of pin
after reset
Description
D
-
-
Video capture Data[7:0]
D
PD
-
Video capture vertical sync input
D
PD
-
Video capture horizontal sync input
D
-
-
Video input field identification signal 0 in odd
field
D
CLK
-
Video capture input clock
D
PD
-
Video capture Data[7:0]
D
-
-
Video capture vertical sync input
D
-
-
Video capture horizontal sync input
D
PD
-
Video input field identification signal 0 in odd
field
D
CLK
-
Video capture input clock
D
PD
-
NRGB666 capture DataR[7:2] (optional)
D PD (*1)
-
NRGB666 capture DataG[7:2] (optional)
D PD (*2)
-
NRGB666 capture DataB[7:2] (optional)
7.2.16. System related pin
Pin name
CLK
XRST
CRIPM[3:0]
VINITHI
PLLBYPASS
BIGEND
PLLVSS
PLLTDTRST
PLLVDD
I/O Polarity
I
-
I
N
I
-
I
-
I
-
I
-
Analog
/Digital
D
D
D
D
D
D
I
-
A
I
-
D
I
-
A
Type
Status of pin
after reset
Description
CLK
ST
-
-
-
-
-
-
-
-
Input clock
-
System reset
-
PLLMODE setting
-
Boot high address
-
PLL bypass mode setting
-
LSI endian setting
Low: Little endian
High: Big endian
-
PLL ground
-
Test pin
Pull up the pin to VDDE, via high resistance
-
PLL power supply
7.2.17. JTAG related pin
Pin name
TCK
XTRST
TMS
TDI
TDO
I/O Polarity
I
-
I
N
I
N
I
-
O
-
Analog
/Digital
D
D
D
D
D
Type
Status of pin
after reset
Description
ST, PU
ST, PU
PU
PU
Tri
-
Test clock
-
Test reset
-
Test mode
-
Test data input
HiZ Test data output
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PROPRIETARY AND CONFIDENTIAL