MB84VD23381FJ Datasheet, PDF (46/54 Pages) Fujitsu Component Limited. – Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM

MB84VD23381FJ-80
• READ (OE Control) /WRITE (WE Control) Timing #2-2 (FCRAM)
Address
CE1r
Low
WE
UB, LB
OE
DQ
tRC
Read Address Valid
tASO
tWR
tBH
tOEH
tOE
tDH
tOLZ
tOHAH
Write Address
tAS
tBS
tOES
tOHZ
tOH
Write Data Input
Read Data Output
Note : CE1r can be tied to Low for WE and OE controlled operation.
When CE1r is tied to Low, output is exclusively controlled by OE.
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