MB84VD23381FJ Datasheet, PDF (10/54 Pages) Fujitsu Component Limited. – Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM

MB84VD23381FJ-80
(Continued)
Parameter
Symbol
Test Conditions
Value
Unit
Min Typ Max
Input Low Level
VIL
—
–0.3 —
0.5 V
Input High Level
VIH
Flash
2.0
VCCf+0.3
—
—
V
FCRAM 2.2
VCCr+0.3
Voltage for Autoselect and
Sector Protection (RESET) *⁷
VID
—
11.5 — 12.5 V
Voltage for WP/ACC Sector
Protection/Unprotection and VACC
—
Program Acceleration
8.5 9.0 9.5 V
FCRAM Output Low Level
VOL VCCr = VCCr Min, IOL =1.0 mA
—
—
0.4 V
FCRAM Output High Level
VOH VCCr = VCCr Min, IOH = –0.5 mA
2.2 —
—
V
Flash Output Low Level
VOL VCCf = VCCf Min, IOL = 4.0 mA
—
— 0.45 V
Flash Output High Level
VOH VCCf = VCCf Min, IOH = –0.1 mA
VCCf–0.4 —
—
V
Flash Low VCC Lock-Out
Voltage
VLKO
—
2.3 2.4 2.5 V
*1 : All voltage are referenced to VSS.
*2 : FCRAM DC characteristics are measured after following POWER-UP timing.
*3 : IOUT depends on the output load conditions.
*4 : The ICC current listed includes both the DC operating current and the frequency dependent component.
*5 : ICC active while Embedded Algorithm (program or erase) is in progress.
*6 : Automatic sleep mode enables the low power mode when address remain stable for 150 ns.
*7 : Applicable for only VCC applying.
*8 : Embedded Algorithm (program or erase) is in progress. (@5 MHz)
*9 : ISB2r depends on VIN cycle time. Please refer to s APPENDIX A.
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