MB84VD23381FJ Datasheet, PDF (45/54 Pages) Fujitsu Component Limited. – Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM

MB84VD23381FJ-80
• READ (OE Control) /WRITE (WE Control) Timing #2-1 (FCRAM)
Address
tOHAH
tAS
CE1r
Low
WE
tBS
UB, LB
OE
DQ
tOES
tOHZ
tOH
Read Data Output
tWC
Write Address
tAH
tWP
tWR
tBH
tDS
tDH
Write Data Input
Read Address
tASO
tOEH
tOLZ
Note : CE1r can be tied to Low for WE and OE controlled operation.
When CE1r is tied to Low, output is exclusively controlled by OE.
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