MB84VD23381FJ Datasheet, PDF (24/54 Pages) Fujitsu Component Limited. – Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM

MB84VD23381FJ-80
• Write/Erase/Program Operations (Flash)
Parameter
Write Cycle Time
Address Setup Time
Address Setup Time to OE Low During Toggle Bit
Polling
Address Hold Time
Address Hold Time from CEf or OE High During
Toggle Bit Polling
Data Setup Time
Data Hold Time
Output
Enable Hold
Time
Read
Toggle and Data Polling
CEf High During Toggle Bit Polling
OE High During Toggle Bit Polling
Read Recover Time Before Write
Read Recover Time Before Write
CEf Setup Time
WE Setup Time
CEf Hold Time
WE Hold Time
Write Pulse Width
CEf Pulse Width
Write Pulse Width High
CEf Pulse Width High
Programming Operation
Sector Erase Operation *¹
VCCf Setup Time
Rise Time to VID *²
Rise Time to VACC *³
Voltage Transition Time *²
Write Pulse Width *²
Symbol
JEDEC Standard
tAVAV
tWC
tAVWL
tAS

tASO
tWLAX
tAH

tAHT
tDVWH
tDS
tWHDX
tDH

tOEH


tGHWL
tGHEL
tELWL
tWLEL
tWHEH
tEHWH
tWLWH
tELEH
tWHWL
tEHEL
tWHWH1
tWHWH2





tCEPH
tOEPH
tGHWL
tGHEL
tCS
tWS
tCH
tWH
tWP
tCP
tWPH
tCPH
tWHWH1
tWHWH2
tVCS
tVIDR
tVACCR
tVLHT
tWPP
Value
Unit
Min Typ Max
70


ns
0


ns
12


ns
45


ns
0


ns
30

0

0

10

20

20

0

0

0

0

0

0

35

35

25

25


6

0.2
50

500 
500 
4

100 

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns
60
µs
1
s

µs

ns

ns

µs

µs
(Continued)
23