MB86604L Datasheet, PDF (42/56 Pages) Fujitsu Component Limited. – SCSI-II Protocol Controller (with single-ended driver/receiver)

MB86604L
s LIST OF REGISTERS
1. BASIC Control Registers (for write)
Address
Hex. A4 A3 A2 A1 A0
Register name
00 0 0 0 0 0 Output data register (first)
01 0 0 0 0 1 Output data register (second)
02 0 0 0 1 0 Direct control register
03 0 0 0 1 1 (Reserved)
04 0 0 1 0 0 SEL/RESEL ID register
05 0 0 1 0 1 Command register
06 0 0 1 1 0 Data block register (MSB)
07 0 0 1 1 1 Data block register (LSB)
08 0 1 0 0 0 Data byte register (MSB)
09 0 1 0 0 1 Data byte register
Data byte register (LSB)
0A 0 1 0 1 0
MC byte register
0B 0 1 0 1 1 Diagnostic control register
0C 0 1 1 0 0 Transfer mode register
0D 0 1 1 0 1 Transfer period register
0E 0 1 1 1 0 Transfer offset register
0F 0 1 1 1 1 Window address register
Bit assignment
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8
DC7 0
0 DO4 0
0
0
0
0
0
0
0
0
0
0
0
SI7 0
0
0
0 SI2 SI1 SI0
CM7 CM6 CM5 CM4 CM3 CM2 CM1 CM0
BL15 BL14 BL13 BL12 BL11 BL10 BL9 BL8
BL7 BL6 BL5 BL4 BL3 BL2 BL1 BL0
BY23 BY22 BY21 BY20 BY19 BY18 BY17 BY16
BY15 BY14 BY13 BY12 BY11 BY10 BY9 BY8
BY7 BY6 BY5 BY4 BY3 BY2 BY1 BY0
DG7
TM7
0
0
WA7
DG6
0
0
0
WA6
DG5
0
0
0
0
0
0
TP4
TO4
0
DG3
0
TP3
TO3
WA3
DG2
0
TP2
TO2
WA2
DG1
0
TP1
TO1
WA1
DG0
0
TP0
TO0
WA0
2. BASIC Control Registers (for read)
Address
Hex. A4 A3 A2 A1 A0
Register name
Bit assignment
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
00 0 0 0 0 0 Input data register (first)
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0
01 0 0 0 0 1 Input data register (second) DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8
02 0 0 0 1 0 SPC status register
SS7 SS6 SS5 SS4 X SS2 SS1 SS0
03 0 0 0 1 1 Nexus status register
NS7 NS6 NS5 X X NS2 NS1 NS0
04 0 0 1 0 0 Interrupt status register
IS7 IS6 IS5 IS4 IS3 IS2 IS1 IS0
05 0 0 1 0 1 Command step register
CS7 CS6 CS5 CS4 CS3 CS2 CS1 CS0
06 0 0 1 1 0 Data block register (MSB) BL15 BL14 BL13 BL12 BL11 BL10 BL9 BL8
07 0 0 1 1 1 Data block register (LSB) BL7 BL6 BL5 BL4 BL3 BL2 BL1 BL0
08 0 1 0 0 0 Data byte register (MSB) BY23 BY22 BY21 BY20 BY19 BY18 BY17 BY16
09 0 1 0 0 1 Data byte register
BY15 BY14 BY13 BY12 BY11 BY10 BY9 BY8
Data byte register (LSB)
0A 0 1 0 1 0
MC byte register
BY7 BY6 BY5 BY4 BY3 BY2 BY1 BY0
0B 0 1 0 1 1 SCSI control signal status register SC7 SC6 SC5 SC4 SC3 SC2 SC1 SC0
0C 0 1 1 0 0 Transfer mode register
TM7 X
X
X
X
X
X
X
0D 0 1 1 0 1 Transfer period register
X
X
X TP4 TP3 TP2 TP1 TP0
0E 0 1 1 1 0 Transfer offset register
X
X
X TO4 TO3 TO2 TO1 TO0
0F 0 1 1 1 1 Modified byte register
X X MB5 BM4 MB3 MB2 MB1 MB0
Note: X indicates data is undefined. (0 or 1).
42