MB86604L Datasheet, PDF (10/56 Pages) Fujitsu Component Limited. – SCSI-II Protocol Controller (with single-ended driver/receiver)

MB86604L
5. Register
The main registers are listed.
• Command register
Command is specified by an 8-bit code.
Specifies the program head address assigned to the user program memory for user program applications.
• Chip status register
Shows the chip's operating state, nexus counterpart ID, and data register state.
• SCSI bus status register
Shows the SCSI control signal state.
• Interrupt status register
Shows 8-bit code.
• Command step register
Shows 8-bit code indicating the command execution state.
Error analysis can be performed by referring to the information in this register and the interrupt status register.
• Group 6/7 command length setting register
Sets the group 6/7 command length which is undefined by the SCSI standard.
By setting the command length in this register, the SPC can determine the command length.
6. Receive-MCS Buffer
A receive only, 32-byte data buffer which stores information received via SCSI (message, command, status)
M: Message, C: Command, S: Status
7. Send-MCS Buffer
A send only, 32-byte data buffer which stores information sent via SCSI (message, command, status)
8. Command User Program Memory
Program memory used for establishing programmable commands (256 bytes).
9. Data Register
FIFO-type data register which stores data in SCSI data phase (32 bytes).
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