MB86604L Datasheet, PDF (29/56 Pages) Fujitsu Component Limited. – SCSI-II Protocol Controller (with single-ended driver/receiver)

MB86604L
• 80 series burst mode
(a) Write timing
Parameter
Symbol
Base signal
Position*
DACK “L” assert time
DREQ “H”
tRQAK
A
DREQ “L” negate time
DREQ “L” → DREQ “H” return time
IOWR “L” assert time
IOWR “L”
tWRRQ
B
—
tRQLH
C
DACK “L”
tAKWR
D
DMBHE, DMA0 set up time
IOWR “L”
tsuDA
E
DMBHE, DMA0 hold time
IOWR “L” level pulse width
IOWR “H”
thDA
F
—
twWRL
G
DACK “H” negate time
IOWR “H”
tWRAK
H
Input data set up time
Input data hold time
IOWR “H”
tsuDMD
I
IOWR “H”
thDMD
J
* : The position number indicates the position in the waveform.
Value
Min.
Max.
0
—
—
55
0
—
0
—
20
—
20
—
40
—
0
—
30
—
5
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DREQ
DACK
DMBHE
DMA0
IOWR
A
t RQAK
D
t AKWR
E
t suDA
DMD15 to DMD0
UDMDP, LDMDP
B
t WRRQ
C
t RQLH
H
t WRAK
G
t wWRL
F
t hDA
I
t suDMD
Data
J
t hDMD
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