MB86604L Datasheet, PDF (28/56 Pages) Fujitsu Component Limited. – SCSI-II Protocol Controller (with single-ended driver/receiver)

MB86604L
• Burst mode (80 series/68 series common)
(a) Data register access cycle time (8 bit)
Parameter
Symbol
Base signal
Position*
Data register access cycle time 1
—
tDCY1
A
Data register access cycle time 2
—
tDCY2
B
Data register access cycle time 3
—
tDCY3
C
* : The position number indicates the position in the waveform.
Value
Min.
Max.
tCLK
—
3 tCLK
—
4 tCLK
—
Unit
ns
ns
ns
IOWR/IORD
DMUDS/DMLDS
A
t DCY1
B
t DCY2
C
t DCY3
(b) Data register access cycle time (16 bit)
Parameter
Symbol
Base signal
Position*
Data register access cycle time 1
—
tDCY1
A
Data register access cycle time 2
—
tDCY2
B
* : The position number indicates the position in the waveform.
Value
Min.
Max.
4 tCLK
—
3 tCLK
—
Unit
ns
ns
IOWR/IORD
DMUDS/DMLDS
A
t DCY1
B
t DCY2
28