MB86604L Datasheet, PDF (25/56 Pages) Fujitsu Component Limited. – SCSI-II Protocol Controller (with single-ended driver/receiver)

MB86604L
(b) Read timing
Parameter
Symbol
Base signal
Position*
DACK “L” assert time
DREQ “H”
tRQAK
A
DREQ “L” negate time
DREQ “H” assert time (8 bit)
DACK “L”
tAKRQ
B
DACK “H”
tAKRQ1
C
DREQ “H” assert time (16 bit)
DACK “H”
tAKRQ2
C
IORD “L” assert time
DMBHE, DMA0 set up time
DACK “L”
tAKRD
D
IORD “L”
tsuDA
E
DMBHE, DMA0 hold time
IORD “H”
thDA
F
IORD “L” level pulse width
DACK “H” negate time
—
twRDL
G
IORD “L”
tRDAK1
H
IORD “H”
tRDAK2
I
Data output defined time
Data output hold time
IORD “L”
tvDMD
J
IORD “H”
thDMD
K
* : The position number indicates the position in the waveform.
Value
Unit
Min.
Max.
0
—
ns
—
40
ns
—
50
ns
—
2 tCLK + 40 ns
0
—
ns
20
—
ns
20
—
ns
40
—
ns
1 tCLK
—
ns
0
—
ns
—
40
ns
10
—
ns
DREQ
A
t RQAK
B
t AKRQ
DACK
DMBHE
DMA0
D
t AKRD
E
t suDA
IORD
DMD15 to DMD0
UDMDP, LDMDP
J
t vDMD
C
t AKRQ1/2
H
t RDAK1
I
t RDAK2
G
t wRDL
F
t hDA
K
t hDMD
Valid data
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