MB86604L Datasheet, PDF (31/56 Pages) Fujitsu Component Limited. – SCSI-II Protocol Controller (with single-ended driver/receiver)

MB86604L
• 68 series burst mode
(a) Write timing
Parameter
Base signal
Symbol
Position*
DACK “L” assert time
DREQ “H”
tRQAK
A
DREQ “L” negate time
DMUDS/DMLDS “L” tDSRQ
B
DREQ “L” → DREQ “H” return time
—
tRQLH
C
DMUDS/DMLDS “L” assert time
DACK “L”
tAKDS
D
DMR/W set up time
DMUDS/DMLDS “L” tsuRW
E
DMR/W hold time
DMUDS/DMLDS “H” thRW
F
DMUDS/DMLDS “L” level pulse width
—
twDSL
G
DACK “H” negate time
DMUDS/DMLDS “H” tDSAK
H
Input data set up time
Input data hold time
DMUDS/DMLDS “H” tsuDMD
I
DMUDS/DMLDS “H” thDMD
J
* : The position number indicates the position in the waveform.
Value
Min.
Max.
0
—
—
55
0
—
0
—
20
—
20
—
40
—
0
—
30
—
5
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DREQ
DACK
A
t RQAK
D
t AKDS
DMR/W
E
t suRW
DMUDS/DMLDS
DMD15 to DMD0
UDMDP, LDMDP
B
t DSRQ
C
t RQLH
H
t DSAK
G
t wDSL
F
t hRW
I
t suDMD
Data
J
t hDMD
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