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MC68HC705KJ1 Datasheet, PDF (94/108 Pages) Motorola, Inc – HCMOS Microcontroller Unit
Electrical Specifications
OSC (NOTE 1)
tRL
RESET
tILIH
IRQ (NOTE 2)
IRQ (NOTE 3)
OSCILLATOR STABILIZATION DELAY(5)
INTERNAL
CLOCK
INTERNAL
ADDRESS BUS
07FE
(NOTE 4)
07FE
07FE
07FE
07FE
07FF
Notes:
1. Internal clocking from OSC1 pin
2. Edge-triggered external interrupt mask option
3. Edge- and level-triggered external interrupt mask option
4. Reset vector shown as example
5. 4064 tcyc or 128 tcyc, depending on the state of SOSCD bit in MOR
Figure 10-8. Stop Mode Recovery Timing
RESET OR INTERRUPT
VECTOR FETCH
VDD
OSC1 PIN
(NOTE 1)
OSCILLATOR STABILIZATION DELAY(3)
INTERNAL
CLOCK
INTERNAL
ADDRESS BUS
07FE
07FE
07FE
07FE
07FE
INTERNAL
DATA BUS
NOTES:
1. Power-on reset threshold is typically between 1 V and 2 V.
2. Internal clock, internal address bus, and internal data bus are not available externally.
3. 4064 tcyc or 128 tcyc depending on the state of SOSCD bit in MOR
Figure 10-9. Power-On Reset Timing
07FE
07FF
NEW
NEW
PCH
PCL
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
94
Freescale Semiconductor