MC68HC705KJ1 Datasheet, PDF (79/108 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Chapter 9
Multifunction Timer Module
9.1 Introduction
The multifunction timer provides a timing reference with programmable real-time interrupt capability.
Figure 9-2 shows the timer organization.
9.2 Features
Features of the multifunction timer include:
• Timer overflow
• Four selectable interrupt rates
• Computer operating properly (COP) watchdog timer
9.3 Operation
A 15-stage ripple counter, preceded by a prescaler that divides the internal clock signal by four, provides
the timing reference for the timer functions. The value of the first eight timer stages can be read at any
time by accessing the timer counter register at address $0009. A timer overflow function at the eighth
stage allows a timer interrupt every 1024 internal clock cycles.
The next four stages lead to the real-time interrupt (RTI) circuit. The RT1 and RT0 bits in the timer status
and control register at address $0008 allow a timer interrupt every 16,384, 32,768, 65,536, or 131,072
clock cycles. The last four stages drive the selectable COP system. For information on the COP, refer to
Chapter 3 Computer Operating Properly Module (COP).
Addr.
Register Name
Timer Status and Control Register ^Read:
$0008
(TSCR) Write:
See page 81.
Reset:
$0009
Timer Counter Register Read:
(TCR)
See page 82. ^Write:
Reset:
Bit 7
TOF
0
TMR7
0
6
5
RTIF
TOIE
0
TMR6
0
TMR5
0
0
= Unimplemented
4
RTIE
0
TMR4
0
3
0
TOFR
0
TMR3
0
Figure 9-1. I/O Register Summary
2
0
RTIFR
0
TMR2
0
1
RT1
1
TMR1
0
Bit 0
RT0
1
TMR0
0
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
79