MC68HC705KJ1 Datasheet, PDF (27/108 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Mask Option Register
2.8 Mask Option Register
The mask option register (MOR) is an EPROM/OTPROM byte that controls the following options:
• COP watchdog (enable or disable)
• External interrupt pin triggering (edge-sensitive only or edge- and level-sensitive)
• Port A external interrupts (enable or disable)
• Port pulldown resistors (enable or disable)
• STOP instruction (stop mode or halt mode)
• Crystal oscillator internal resistor (enable or disable)
• EPROM security (enable or disable)
• Short oscillator delay (enable or disable)
Take the following steps to program the mask option register (MOR):
1. Apply the programming voltage, V_PP, to the IRQ/V_PP pin.
2. Write to the MOR.
3. Set the MPGM bit and wait for a time, t_MPGM.
4. Clear the MPGM bit.
5. Reset the MCU.
Address:
Read:
Write:
Reset:
$07F1
Bit 7
SOSCD
6
5
4
3
2
EPMSEC OSCRES SWAIT SWPDI PIRQ
Unaffected by reset
Figure 2-4. Mask Option Register (MOR)
1
LEVEL
Bit 0
COPEN
SOSCD — Short Oscillator Delay Bit
The SOSCD bit controls the oscillator stabilization counter. The normal stabilization delay following
reset or exit from stop mode is 4064 t_cyc. Setting SOSCD enables a 128 t_cyc stabilization delay.
1 = Short oscillator delay enabled
0 = Short oscillator delay disabled
EPMSEC — EPROM Security Bit
The EPMSEC bit controls access to the EPROM/OTPROM.
1 = External access to EPROM/OTPROM denied
0 = External access to EPROM/OTPROM not denied
OSCRES — Oscillator Internal Resistor Bit
The OSCRES bit enables a 2-MΩ internal resistor in the oscillator circuit.
1 = Oscillator internal resistor enabled
0 = Oscillator internal resistor disabled
NOTE
Program the OSCRES bit to logic 0 in devices using low-speed crystal or
RC oscillators with external resistor.
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
27