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MC68HC705KJ1 Datasheet, PDF (81/108 Pages) Motorola, Inc – HCMOS Microcontroller Unit | |||
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9.5 I/O Registers
The following registers control and monitor the timer operation:
⢠Timer status and control register (TSCR)
⢠Timer counter register (TCR)
I/O Registers
9.5.1 Timer Status and Control Register
The read/write timer status and control register performs the following functions:
⢠Flags timer interrupts
⢠Enables timer interrupts
⢠Resets timer interrupt flags
⢠Selects real-time interrupt rates
Address: $0008
Bit 7
6
5
4
3
2
1
Bit 0
Read: TOF
RTIF
0
0
TOIE
RTIE
RT1
RT0
Write:
TOFR RTIFR
Reset: 0
0
0
0
0
0
1
1
= Unimplemented
Figure 9-3. Timer Status and Control Register (TSCR)
TOF â Timer Overflow Flag
This read-only flag becomes set when the first eight stages of the counter roll over from $FF to $00.
TOF generates a timer overflow interrupt request if TOIE is also set. Clear TOF by writing a logic 1 to
the TOFR bit. Writing to TOF has no effect. Reset clears TOF.
RTIF â Real-Time Interrupt Flag
This read-only flag becomes set when the selected RTI output becomes active. RTIF generates a
real-time interrupt request if RTIE is also set. Clear RTIF by writing a logic 1 to the RTIFR bit. Writing
to RTIF has no effect. Reset clears RTIF.
TOIE â Timer Overflow Interrupt Enable Bit
This read/write bit enables timer overflow interrupts. Reset clears TOIE.
1 = Timer overflow interrupts enabled
0 = Timer overflow interrupts disabled
RTIE â Real-Time Interrupt Enable Bit
This read/write bit enables real-time interrupts. Reset clears RTIE.
1 = Real-time interrupts enabled
0 = Real-time interrupts disabled
TOFR â Timer Overflow Flag Reset Bit
Writing a logic 1 to this write-only bit clears the TOF bit. TOFR always reads as logic 0. Reset clears
TOFR.
RTIFR â Real-Time Interrupt Flag Reset Bit
Writing a logic 1 to this write-only bit clears the RTIF bit. RTIFR always reads as logic 0. Reset clears
RTIFR.
MC68HC705KJ1 ⢠MC68HRC705KJ1 ⢠MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
81
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