MC68HC705KJ1 Datasheet, PDF (75/108 Pages) Motorola, Inc – HCMOS Microcontroller Unit

8.3.3 Timer Interrupts
The timer can generate the following interrupt requests:
• Real time
• Timer overflow
Setting the I bit in the condition code register disables timer interrupts.
Interrupts
8.3.3.1 Real-Time Interrupt
A real-time interrupt occurs if the real-time interrupt flag, RTIF, becomes set while the real-time interrupt
enable bit, RTIE, is also set. RTIF and RTIE are in the timer status and control register.
8.3.3.2 Timer Overflow Interrupt
A timer overflow interrupt request occurs if the timer overflow flag, TOF, becomes set while the timer
overflow interrupt enable bit, TOIE, is also set. TOF and TOIE are in the timer status and control register.
8.3.4 Interrupt Processing
The CPU takes the following actions to begin servicing an interrupt:
• Stores the CPU registers on the stack in the order shown in Figure 8-6
• Sets the I bit in the condition code register to prevent further interrupts
• Loads the program counter with the contents of the appropriate interrupt vector locations:
– $07FC and $07FD (software interrupt vector)
– $07FA and $07FB (external interrupt vector)
– $07F8 and $07F9 (timer interrupt vector)
The return-from-interrupt (RTI) instruction causes the CPU to recover the CPU registers from the stack
as shown in Figure 8-6.
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
75