MC68HC705KJ1 Datasheet, PDF (14/108 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Introduction
1.2 Structure
OSC1
OSC2
INTERNAL
OSCILLATOR
DIVIDE
BY ³2
15-STAGE
MULTIFUNCTION
TIMER SYSTEM
RESET
IRQ/V_PP
WATCHDOG AND
ILLEGAL ADDRESS
DETECT
CPU CONTROL
ALU
68HC05 CPU
CPU REGISTERS
ACCUMULATOR
INDEX REGISTER
0 0 0 0 0 0 0 0 1 1 STK PTR
PB3⁽¹⁾
PB2⁽¹⁾
PROGRAM COUNTER
CONDITION CODE
REGISTER
111H I NZC
STATIC RAM (SRAM) – 64 BYTES
USER EPROM – 1240 BYTES
PA7
PA6
PA5
PA4
PA3^{(1) (2)}
PA2^{(1) (2)}
PA1^{(1) (2)}
PA0^{(1) (2)}
MASK OPTION REGISTER (MOR)
10-mA sink capability on all I/O pins
Notes:
1. 5.5 mA source capability
2. External interrupt capability
Figure 1-1. Block Diagram
MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1
14
Freescale Semiconductor